Moo-Kyoung Chung

According to our database1, Moo-Kyoung Chung authored at least 15 papers between 2004 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2014
ULP-SRP: Ultra Low-Power Samsung Reconfigurable Processor for Biomedical Applications.
ACM Trans. Reconfigurable Technol. Syst., 2014

SimParallel: A high performance parallel SystemC simulator using hierarchical multi-threading.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
Mapping and Scheduling of Tasks and Communications on Many-Core SoC Under Local Memory Constraint.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Adaptive compression for instruction code of Coarse Grained Reconfigurable Architectures.
Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

2012
Design and evaluation of a four-port data cache for high instruction level parallelism reconfigurable processors.
Proceedings of the 30th International IEEE Conference on Computer Design, 2012

Efficient code compression for coarse grained reconfigurable architectures.
Proceedings of the 30th International IEEE Conference on Computer Design, 2012

Implementation of a volume rendering on coarse-grained reconfigurable multiprocessor.
Proceedings of the 2012 International Conference on Field-Programmable Technology, 2012

2010
Low latency variable length coding scheme for frame memory recompression.
Proceedings of the 2010 IEEE International Conference on Multimedia and Expo, 2010

2009
Lossless frame memory recompression for video codec preserving random accessibility of coding unit.
IEEE Trans. Consumer Electron., 2009

2007
Cache Miss-Aware Dynamic Stack Allocation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006
Enhancing Performance of HW/SW Cosimulation and Coemulation by Reducing Communication Overhead.
IEEE Trans. Computers, 2006

Improving Lookahead in Parallel Multiprocessor Simulation Using Dynamic Execution Path Prediction.
Proceedings of the 20th IEEE/ACM/SCS Workshop on Principles of Advanced and Distributed Simulation, 2006

2005
Performance Improvement of Multiprocessor Simulation by Optimizing Synchronization a Communication.
Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 2005

A Prediction Packetizing Scheme for Reducing Channel Traffic in Transaction-Level Hardware/Software Co-Emulation.
Proceedings of the 2005 Design, 2005

2004
Improvement of Compiled Instruction Set Simulator by Increasing Flexibility a.
Proceedings of the 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 2004


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