Monte Manning
According to our database1,
Monte Manning
authored at least 2 papers
between 2010 and 2016.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2016
Reset-Check-Reverse-Flag Scheme on NRAM With 50% Bit Error Rate or 35% Parity Overhead and 16% Decoding Latency Reductions for Read-Intensive Storage Class Memory.
IEEE J. Solid State Circuits, 2016
2010
Proceedings of the 36th European Solid-State Circuits Conference, 2010