Mon-Shu Ho
According to our database1,
Mon-Shu Ho
authored at least 8 papers
between 2012 and 2023.
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Bibliography
2023
A 28nm Nonvolatile AI Edge Processor using 4Mb Analog-Based Near-Memory-Compute ReRAM with 27.2 TOPS/W for Tiny AI Edge Devices.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
2019
Considerations Of Integrating Computing-In-Memory And Processing-In-Sensor Into Convolutional Neural Network Accelerators For Low-Power Edge Devices.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
Challenges of emerging memory and memristor based circuits: Nonvolatile logics, IoT security, deep learning and neuromorphic computing.
Proceedings of the 12th IEEE International Conference on ASIC, 2017
2015
RRAM-based 7T1R nonvolatile SRAM with 2x reduction in store energy and 94x reduction in restore energy for frequent-off instant-on applications.
Proceedings of the Symposium on VLSI Circuits, 2015
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
2014
A low-power subthreshold-to-superthreshold level-shifter for sub-0.5V embedded resistive RAM (ReRAM) macro in ultra low-voltage chips.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014
2012
A 260mV L-shaped 7T SRAM with bit-line (BL) Swing expansion schemes based on boosted BL, asymmetric-VTH read-port, and offset cell VDD biasing techniques.
Proceedings of the Symposium on VLSI Circuits, 2012