Mojtaba Mahdavi
Orcid: 0000-0002-0998-6297Affiliations:
- Ericsson, Lund, Sweden
- Lund University, Department of Electrical and Information Technology, Sweden (former)
According to our database1,
Mojtaba Mahdavi
authored at least 23 papers
between 2017 and 2024.
Collaborative distances:
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Bibliography
2024
Channel Estimation using Processing In Memory Based on System Identification Technique.
Proceedings of the 11th International Conference on Wireless Networks and Mobile Communications, 2024
Hardware Realization of Vector and Matrix Norm Calculation for Signal Processing Applications.
Proceedings of the 11th International Conference on Wireless Networks and Mobile Communications, 2024
Proceedings of the IEEE International Conference on Communications, 2024
Efficient Hardware Acceleration of Mean Squared Error Calculation Through In-Memory Computing.
Proceedings of the IEEE International Conference on Omni-layer Intelligent Systems, 2024
Proceedings of the International Conference on Computer, 2024
Proceedings of the IEEE International Black Sea Conference on Communications and Networking, 2024
Proceedings of the IEEE International Black Sea Conference on Communications and Networking, 2024
2023
Proceedings of the 10th International Conference on Wireless Networks and Mobile Communications, 2023
Reordering-Less FFT: A Novel FFT Processor with Parallel Input/Output in Normal Order.
Proceedings of the International Conference on Software, 2023
Fully Parallel, Flexible, and Conflict-Free Interleaver Design using Processing in Memory.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
Towards Low-Complexity, Fully Parallel and Flexible Hardware Realization of DCT/IDCT.
Proceedings of the 16th International Conference on Signal Processing and Communication System, 2023
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023
2022
Spatially Coupled Serially Concatenated Codes: Performance Evaluation and VLSI Design Tradeoffs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
2021
Baseband Processing for 5G and Beyond: Algorithms, VLSI Architectures, and Co-design.
PhD thesis, 2021
The Effect of Coupling Memory and Block Length on Spatially Coupled Serially Concatenated Codes.
Proceedings of the 93rd IEEE Vehicular Technology Conference, 2021
Proceedings of the 11th International Symposium on Topics in Coding, 2021
2020
Angular-Domain Massive MIMO Detection: Algorithm, Implementation, and Design Tradeoffs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
2019
A Low Latency FFT/IFFT Architecture for Massive MIMO Systems Utilizing OFDM Guard Bands.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
Proceedings of the 2018 IEEE Global Conference on Signal and Information Processing, 2018
2017
IEEE Trans. Circuits Syst. II Express Briefs, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017