Moisés Arredondo-Velázquez

Orcid: 0000-0003-0198-274X

According to our database1, Moisés Arredondo-Velázquez authored at least 7 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2024
Hardware Parallel Structure for Convolution Computing in Image Processing.
Proceedings of the 47th International Conference on Telecommunications and Signal Processing, 2024

NN-Based Encoding Applied to a Time-to-Digital Converter for Time Interval Measurements.
Proceedings of the 47th International Conference on Telecommunications and Signal Processing, 2024

2023
Potential Use of State-of-the-Art TDCs for Particle Identification in Particle Physics Experiments.
IEEE Instrum. Meas. Mag., September, 2023

Trimmed-TDL-Based TDC Architecture for Time-of-Flight Measurements Tested on a Cyclone V FPGA.
IEEE Trans. Instrum. Meas., 2023

2022
Hardware Flexible Systolic Architecture for Convolution Accelerator in Convolutional Neural Networks.
Proceedings of the 45th International Conference on Telecommunications and Signal Processing, 2022

2020
A streaming architecture for Convolutional Neural Networks based on layer operations chaining.
J. Real Time Image Process., 2020

2019
A streaming accelerator of Convolutional Neural Networks for resource-limited applications.
IEICE Electron. Express, 2019


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