Mohit Upadhyay

According to our database1, Mohit Upadhyay authored at least 9 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2024
NOVA: NoC-based Vector Unit for Mapping Attention Layers on a CNN Accelerator.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023
1.7pJ/SOP Neuromorphic Processor with Integrated Partial Sum Routers for In-Network Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022
Network-on-Chip-Centric Accelerator Architectures for Edge AI Computing.
Proceedings of the 19th International SoC Design Conference, 2022

Blockchain Machine: A Network-Attached Hardware Accelerator for Hyperledger Fabric.
Proceedings of the 42nd IEEE International Conference on Distributed Computing Systems, 2022

REACT: a heterogeneous reconfigurable neural network accelerator with software-configurable NoCs for training and inference on wearables.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2019
Multi-application Based Network-on-Chip Design for Mesh-of-Tree Topology Using Global Mapping and Reconfigurable Architecture.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

2018
A Novel Fault-Tolerant Routing Algorithm for Mesh-of-Tree Based Network-on-Chips.
Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018

A Novel Fault-Tolerant Routing Technique for Mesh-of-Tree based Network-on-Chip Design.
Proceedings of the TENCON 2018, 2018

Fault Tolerant Routing Methodology for Mesh-of-Tree based Network-on-Chips using Local Reconfiguration.
Proceedings of the 2018 International Conference on High Performance Computing & Simulation, 2018


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