Mohit Pathak

According to our database, Mohit Pathak authored at least 11 papers between 2004 and 2015.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2015

Design and Analysis of 3D-MAPS (3D Massively Parallel Processor with Stacked Memory).

Daehyun Kim, Krit Athikulwongse, Michael B. Healy, Mohammad M. Hossain, Moongon Jung, Ilya Khorosh, Gokul Kumar, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Shreepad Panth, Mohit Pathak, Minzhen Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim

IEEE Trans. Computers, 2015

2012

3D-MAPS: 3D Massively parallel processor with stacked memory.

Dae Hyun Kim, Krit Athikulwongse, Michael B. Healy, Mohammad M. Hossain, Moongon Jung, Ilya Khorosh, Gokul Kumar, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Shreepad Panth, Mohit Pathak, Minzhen Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

Exploiting die-to-die thermal coupling in 3D IC placement.

Krit Athikulwongse, Mohit Pathak, Sung Kyu Lim

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Design for manufacturability and reliability for TSV-based 3D ICs.

David Z. Pan, Sung Kyu Lim, Krit Athikulwongse, Moongon Jung, Joydeep Mitra, Jiwoo Pak, Mohit Pathak, Jae-Seok Yang

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011

Electromigration modeling and full-chip reliability analysis for BEOL interconnect in TSV-based 3D ICs.

Mohit Pathak, Jiwoo Pak, David Z. Pan, Sung Kyu Lim

Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

2010

Through-silicon-via management during 3D physical design: When to add and how many?

Mohit Pathak, Young-Joon Lee, Thomas Moon, Sung Kyu Lim

Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

Design and analysis of 3D-MAPS: A many-core 3D processor with stacked memory.

Michael B. Healy, Krit Athikulwongse, Rohan Goel, Mohammad M. Hossain, Dae Hyun Kim, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Moongon Jung, Brian Ouellette, Mohit Pathak, Hemant Sane, Guanhao Shen, Dong Hyuk Woo, Xin Zhao, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim

Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009

Performance and Thermal-Aware Steiner Routing for 3-D Stacked ICs.

Mohit Pathak, Sung Kyu Lim

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

2007

Placement and routing of RF embedded passive designs in LCP substrate.

Mohit Pathak, Souvik Mukherjee, Madhavan Swaminathan, Ege Engin, Sung Kyu Lim

Proceedings of the 25th International Conference on Computer Design, 2007

Thermal-aware Steiner routing for 3D stacked ICs.

Mohit Pathak, Sung Kyu Lim

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

2004

Net and Pin Distribution for 3D Package Global Routing.

Jacob R. Minz, Mohit Pathak, Sung Kyu Lim

Proceedings of the 2004 Design, 2004