Mohit P. Hirpara

According to our database, Mohit P. Hirpara authored at least 2 papers in 2019.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of six.

2019

An Efficient Design Approach for Implementation of 2 Bit Ternary Flash ADC Using Optimized Complementary TFET Devices.

Sanjay Vidhyadharan, Ramakant Ramakant, Abhay S. Vidhyadharan, A. Krishna Shyam, Mohit P. Hirpara, Surya Shankar Dan

Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

Novel Low and High Threshold TFET Based NTI and PTI Cells Benchmarked with Standard 45 nm CMOS Technology for Ternary Logic Applications.

Ramakant Ramakant, Sanjay Vidhyadharan, A. Krishna Shyam, Mohit P. Hirpara, Tanmay Chaudhary, Surya Shankar Dan

Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019