Mohammed Y. Niamat
Orcid: 0000-0002-1896-1569
According to our database1,
Mohammed Y. Niamat
authored at least 50 papers
between 1994 and 2024.
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Bibliography
2024
A Zero Trust-Based Framework Employing Blockchain Technology and Ring Oscillator Physical Unclonable Functions for Security of Field Programmable Gate Array Supply Chain.
IEEE Access, 2024
ZEBRA: Zero Trust Architecture Employing Blockchain Technology and ROPUF for AMI Security.
IEEE Access, 2024
Hardware Trojan Detection employing Machine Learning, Physical Unclonable Functions and Side Channel Analysis.
Proceedings of the IEEE International Conference on Electro Information Technology, 2024
A Zero Trust Architecture employing Blockchain and Ring Oscillator Physical Unclonable Function for Internet-of-Things.
Proceedings of the IEEE International Conference on Electro Information Technology, 2024
2023
Ring Oscillator PUF and Blockchain: A Way of Securing Post Fabrication FPGA Supply Chain.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
Proceedings of the IEEE International Conference on Electro Information Technology, 2023
Towards Blockchain-enabled Mask Writing for Security against Hardware Trojan Intrusion.
Proceedings of the IEEE International Conference on Electro Information Technology, 2023
2021
Machine Learning Vulnerability Analysis of FPGA-based Ring Oscillator PUFs and Counter Measures.
ACM J. Emerg. Technol. Comput. Syst., 2021
IEEE Access, 2021
Enhancing the Performance of Lightweight Configurable PUF for Robust IoT Hardware-Assisted Security.
IEEE Access, 2021
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
2020
Defense Mechanism Vulnerability Analysis of Ring Oscillator PUFs Against Neural Network Modeling Attacks using the Dragonfly Algorithm.
Proceedings of the 2020 IEEE International Conference on Electro Information Technology, 2020
Proceedings of the 2020 IEEE International Conference on Electro Information Technology, 2020
2019
Analysis and Machine Learning Vulnerability Assessment of XOR-Inverter based Ring Oscillator PUF Design.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
2018
IEEE Trans. Smart Grid, 2018
Inf., 2018
A Dynamic Area-Efficient Technique to Enhance ROPUFs Security Against Modeling Attacks.
Proceedings of the Computer and Network Security Essentials., 2018
2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
2016
A novel security technique to generate truly random and highly reliable reconfigurable ROPUF-based cryptographic keys.
Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016
2015
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
Analyzing the performance of a configurable ROPUF design controlled by programmable XOR gates.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
Temperature, Voltage, and Aging Effects in Ring Oscillator Physical Unclonable Function.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015
2014
Proceedings of the Field-Coupled Nanocomputing - Paradigms, Progress, and Perspectives, 2014
Asynchronous physical unclonable function using FPGA-based self-timed ring oscillator (abstract only).
Proceedings of the 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2014
Proceedings of the IEEE International Conference on Electro/Information Technology, 2014
Proceedings of the IEEE International Conference on Electro/Information Technology, 2014
2013
Asynchronous approach to ring oscillator for FPGA-based Physical Unclonable Function design.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
2012
FPGA based device specific key generation method using Physically Uncloanble Functions and neural networks.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
Design of a nanoscale Quantum-dot Cellular Automata Configurable Logic Block for FPGAs.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
FPGA based trustworthy authentication technique using Physically Unclonable Functions and artificial intelligence.
Proceedings of the 2012 IEEE International Symposium on Hardware-Oriented Security and Trust, 2012
FPGA based key generation technique for anti-counterfeiting methods using Physically Unclonable Functions and artificial intelligence.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012
Modeling impact of bypass diodes on photovoltaic cell performance under partial shading.
Proceedings of the 2012 IEEE International Conference on Electro/Information Technology, 2012
Proceedings of the 2012 IEEE International Conference on Electro/Information Technology, 2012
Proceedings of the Web Technologies and Applications - 14th Asia-Pacific Web Conference, 2012
2011
Proceedings of the Ninth Annual Conference on Privacy, Security and Trust, 2011
Proceedings of the Eighth International Conference on Information Technology: New Generations, 2011
Proceedings of the 21st International Conference on Systems Engineering (ICSEng 2011), 2011
2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010
Built-In Self-Test Circuit Optimization for Embedded Cores.
Proceedings of the 2010 International Conference on Computer Design, 2010
Quantum-Dot Cellular Automata Implementation of FPGA Configurable Logic Blocks.
Proceedings of the 2010 International Conference on Computer Design, 2010
2007
2006
Proceedings of the ACM/SIGDA 14th International Symposium on Field Programmable Gate Arrays, 2006
2005
Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005
BIST for Embedded SRAMs in System on Chips.
Proceedings of The 2005 International Conference on Embedded Systems and Applications, 2005
1994
Design of a Mesh-Type Systolic Array Architecture for the Fast Computation of the Single Linkage Algorithm.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994