Mohammed A. S. Khalid
Orcid: 0000-0003-3903-8789
According to our database1,
Mohammed A. S. Khalid
authored at least 45 papers
between 1998 and 2024.
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Bibliography
2024
A High Speed and Area Efficient Processor for Elliptic Curve Scalar Point Multiplication for GF(2<sup>m</sup>).
IEEE Trans. Very Large Scale Integr. Syst., August, 2024
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024
2023
Novel Formulations of M-Term Overlap-Free Karatsuba Binary Polynomial Multipliers and Their Hardware Implementations.
IEEE Trans. Very Large Scale Integr. Syst., October, 2023
2022
An Optimized M-Term Karatsuba-Like Binary Polynomial Multiplier for Finite Field Arithmetic.
IEEE Trans. Very Large Scale Integr. Syst., 2022
Proceedings of the IEEE Canadian Conference on Electrical and Computer Engineering, 2022
2021
IEEE Trans. Very Large Scale Integr. Syst., 2021
Int. J. Comput. Aided Eng. Technol., 2021
2020
Experimental evaluation and comparison of latency-optimized opticaland conventional multi-FPGA systems.
Des. Autom. Embed. Syst., 2020
IEEE Access, 2020
FPGA-Based Evaluation and Implementation of an Automotive RADAR Signal Processing System using High-Level Synthesis.
Proceedings of the IEEE Canadian Conference on Electrical and Computer Engineering, 2020
2019
FPGA-Based Acceleration of Expectation Maximization Algorithm Using High-Level Synthesis.
Proceedings of the 2019 Conference on Design and Architectures for Signal and Image Processing, 2019
2018
Microprocess. Microsystems, 2018
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
2017
Experimental evaluation and comparison of two recent Network-on-Chip routers for FPGAs.
Microprocess. Microsystems, 2017
Proceedings of the 30th IEEE Canadian Conference on Electrical and Computer Engineering, 2017
2016
ACM Trans. Reconfigurable Technol. Syst., 2016
IEEE Commun. Surv. Tutorials, 2016
Experimental evaluation and comparison of time-multiplexed multi-FPGA routing architectures.
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016
An FPGA-Based Controller for a 77 GHz MEMS Tri-Mode Automotive Radar (Abstract Only).
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016
2015
Proceedings of the IEEE 28th Canadian Conference on Electrical and Computer Engineering, 2015
Proceedings of the IEEE 28th Canadian Conference on Electrical and Computer Engineering, 2015
2014
Control Mechanism to Solve False Blocking Problem at MAC Layer in Wireless Sensor Networks.
Proceedings of the 2014 27th International Conference on VLSI Design, 2014
Proceedings of the 26th International Conference on Microelectronics, 2014
2013
EURASIP J. Embed. Syst., 2013
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
2011
A novel simplified Log-MAP algorithm suitable for hardware implementation of turbo decoding.
Proceedings of the 24th Canadian Conference on Electrical and Computer Engineering, 2011
2010
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010
2009
SC Build: a computer-aided design tool for design space exploration of embedded central processing unit cores for field-programmable gate arrays.
IET Comput. Digit. Tech., 2009
Evaluation and Design Space Exploration of a Time-Division Multiplexed NoC on FPGA for Image Analysis Applications.
EURASIP J. Embed. Syst., 2009
Proceedings of the 17th European Signal Processing Conference, 2009
Proceedings of the 2009 IEEE International Conference on Electro/Information Technology, 2009
2008
J. Circuits Syst. Comput., 2008
J. Comput., 2008
2007
Digit. Signal Process., 2007
2006
IEEE Signal Process. Lett., 2006
Computationally-Efficient DNLMS-Based Adaptive Algorithms for Echo Cancellation Application.
J. Commun., 2006
Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006
2005
Proceedings of the 10th IEEE Symposium on Computers and Communications (ISCC 2005), 2005
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005
2000
IEEE Trans. Very Large Scale Integr. Syst., 2000
1999
Hardwired-Clusters Partial-Crossbar: A Hierarchical Routing Architecture for Multi-FPGA Systems.
Proceedings of the Parallel and Distributed Processing, 1999
1998
A Hybrid Complete-Graph Partial-Crossbar Routing Architecture for Multi-FPGA Systems.
Proceedings of the 1998 ACM/SIGDA Sixth International Symposium on Field Programmable Gate Arrays, 1998