Mohammad Waris

According to our database, Mohammad Waris authored at least 2 papers between 2014 and 2015.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2015

An all digital delay lock loop architecture for high precision timing generator.

Mohammad Waris, Urvi Mehta, Rajiv Kumaran, Sanjeev Mehta, Arup Roy Chowdhury

Proceedings of the 19th International Symposium on VLSI Design and Test, 2015

2014

Generic and programmable Timing Generator for CCD detectors.

Parth Shah, Bhavesh Soni, Mohammad Waris, Rajiv Kumaran, Sanjeev Mehta, Arup Roy Chowdhury

Proceedings of the 2014 International Conference on Advances in Computing, 2014