Mohammad Reza Salehi

Orcid: 0000-0002-7251-3564

According to our database1, Mohammad Reza Salehi authored at least 33 papers between 2014 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2024
An ultra-low-power CWM/SCM demodulator for inductive-powered IMDs with the DRCF ratio of 50% and the powering index of 75%.
Int. J. Circuit Theory Appl., July, 2024

A low power-area low pass <i>G</i><sub><i>m</i></sub><i>-C</i> filter in biomedical analog front end for biosignal acquisition.
Int. J. Circuit Theory Appl., May, 2024

A neuro-fuzzy QP estimation approach for H.266/VVC-based live video broadcasting systems.
Multim. Tools Appl., 2024

2023
Video Rate Controller Development Through Neuro-Fuzzy Quantization Parameter Modifiers.
J. Signal Process. Syst., June, 2023

One-sided 10T static-random access memory cell for energy-efficient and noise-immune internet of things applications.
Int. J. Circuit Theory Appl., January, 2023

A dual-output switched-capacitor regulator with a self-controlled ripple reduction technique for self-powered EEG acquisition.
Microelectron. J., 2023

A 0.2-V 1.2 nW 1-KS/s SAR ADC with a novel comparator structure for biomedical applications.
Integr., 2023

2022
Design of a Dynamic ADC Comparator with Low Power and Low Delay Time for IoT Application.
Wirel. Pers. Commun., 2022

Overcoming the practical restrictions in H.266/VVC-based video communication systems by a PI bit rate controller.
Multim. Syst., 2022

2021
A neural network-based video bit-rate control algorithm for variable bit-rate applications of versatile video coding standard.
Signal Process. Image Commun., 2021

A robust and write bit-line free sub-threshold 12T-SRAM for ultra low power applications in 14 nm FinFET technology.
Microelectron. J., 2021

Newly energy-efficient SRAM bit-cell using GAA CNT-GDI method with asymmetrical write and built-in read-assist schemes for QR code-based multimedia applications.
Microelectron. J., 2021

A frame-level MLP-based bit-rate controller for real-time video transmission using VVC standard.
J. Real Time Image Process., 2021

Design of a Low Power Analog and Multi-shaped Fully Programmable Twin-Cell Membership Function Generator Circuit in 65 nm CMOS Technology.
Circuits Syst. Signal Process., 2021

A New Low-Power Charge Pump with a Glitch-Free PFD for Speedup the Acquisition Process of a PLL in 65 nm CMOS Technology.
Circuits Syst. Signal Process., 2021

An improved version of local activities estimation to enhance motor imagery classification.
Biomed. Signal Process. Control., 2021

2020
Color-based feature extraction with application to facial recognition using tensor-matrix and tensor-tensor analysis.
Multim. Tools Appl., 2020

An implementation of a new 11-bit 1.2 ​GS/s hybrid DAC with a noval 3-bit Sub-DAC.
Microelectron. J., 2020

Low power and low phase noise VCO with dual current shaping for IoT applications.
Turkish J. Electr. Eng. Comput. Sci., 2020

Optimized Gate Diffusion Input Method-Based Reversible Magnitude Arithmetic Unit Using Non-dominated Sorting Genetic Algorithm II.
Circuits Syst. Signal Process., 2020

2019
A novel high-speed low-power dynamic comparator with complementary differential input in 65 nm CMOS technology.
Microelectron. J., 2019

A Low-Power High-Linear Time-to-Digital Converter for Measuring R-R Intervals in ECG Signal Optimized by Neural Network and TLBO Algorithm.
J. Circuits Syst. Comput., 2019

Improving the performance of the motor imagery-based brain-computer interfaces using local activities estimation.
Biomed. Signal Process. Control., 2019

2018
A Two Stage Variable-Gain Low-Noise Amplifier for X-Band in 0.18 µm CMOS.
Wirel. Pers. Commun., 2018

Automatic colourization of grayscale images based on tensor decomposition.
Multim. Tools Appl., 2018

Two-stage current-reused variable-gain low-noise amplifier for X-band receivers in 65 nm complementary metal oxide semiconductor technology.
IET Circuits Devices Syst., 2018

A High-Accurate Exponential Function Generator Based on a New Pseudo-Approximation Method by TLBO Optimization Algorithm.
Circuits Syst. Signal Process., 2018

2015
An Optimized Regulator with 290 nA Quiescent Current and 115 μW Power Consumption for UHF RFID Tags Using TLBO Algorithm.
Wirel. Pers. Commun., 2015

A 1.58 nW power consumption and 34.45 ppm/°C temperature coefficient bandgap reference (BGR) for subblocks of RFID tag.
Microelectron. J., 2015

A new approach based on TLBO for DC-DC converter in RFID tag.
J. Intell. Fuzzy Syst., 2015

A new evolutionary optimization algorithm for design of low power QPSK backscatter modulator.
J. Intell. Fuzzy Syst., 2015

Parameter identification of power plant characteristics based on PMU data using differential evolution-based improved shuffled frog leaping algorithm.
Int. J. Bio Inspired Comput., 2015

2014
A low phase noise and low power 3-5 GHz frequency synthesizer in 0.18 µm CMOS technology.
Microelectron. J., 2014


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