Mohammad Nasim Imtiaz Khan

Junde Li

Sachhidh Kannan

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021

SecNVM: Power Side-Channel Elimination Using On-Chip Capacitors for Highly Secure Emerging NVM.

[BibT_eX]

[DOI]

Farid Uddin Ahmed

Masud H. Chowdhury

IEEE Trans. Very Large Scale Integr. Syst., 2021

SCARE: Side Channel Attack on In-Memory Computing for Reverse Engineering.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2021

Reconfigurable and Dense Analog Circuit Design Using Two Terminal Resistive Memory.

[BibT_eX]

[DOI]

Abdullah Ash-Saki

IEEE Trans. Emerg. Top. Comput., 2021

Comprehensive Study of Security and Privacy of Emerging Non-Volatile Memories.

[BibT_eX]

[DOI]

CoRR, 2021

2020

Cache-Out: Leaking Cache Memory Using Hardware Trojan.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2020

HarTBleed: Using Hardware Trojans for Data Leakage Exploits.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2020

Test Methodologies and Test-Time Compression for Emerging Non-Volatile Memory.

[BibT_eX]

[DOI]

IEEE Trans. Reliab., 2020

TrappeD: DRAM Trojan Designs for Information Leakage and Fault Injection Attacks.

[BibT_eX]

[DOI]

CoRR, 2020

Recent Advances in Emerging Technology-based Security Primitives, Attacks and Mitigation.

[BibT_eX]

[DOI]

Abdullah Ash-Saki

Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

Assuring Security and Reliability of Emerging Non-Volatile Memories.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Test Conference, 2020

Multi-Bit Read and Write Methodologies for Diode-MTJ Crossbar Array.

[BibT_eX]

[DOI]

Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

A Morphable Physically Unclonable Function and True Random Number Generator using a Commercial Magnetic Memory.

[BibT_eX]

[DOI]

Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

Power Side Channel Attack Analysis and Detection.

[BibT_eX]

[DOI]

Navyata Gattu

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

2019

RF-Trojan: Leaking Kernel Data Using Register File Trojan.

[BibT_eX]

[DOI]

CoRR, 2019

SHINE: A Novel SHA-3 Implementation Using ReRAM-based In-Memory Computing.

[BibT_eX]

[DOI]

Anupam Chattopadhyay

Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019

Meeting the Conflicting Goals of Low-Power and Resiliency Using Emerging Memories : (Invited Paper).

[BibT_eX]

[DOI]

Abdullah Ash-Saki

Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

ENTT: A Family of Emerging NVM-based Trojan Triggers.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2019

Hardware Trojans in Emerging Non-Volatile Memories.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018

Novel Magnetic Burn-In for Retention and Magnetic Tolerance Testing of STTRAM.

[BibT_eX]

[DOI]

Anirudh Iyengar

IEEE Trans. Very Large Scale Integr. Syst., 2018

Test challenges and solutions for emerging non-volatile memories.

[BibT_eX]

[DOI]

Proceedings of the 36th IEEE VLSI Test Symposium, 2018

Test of Supply Noise for Emerging Non-Volatile Memory.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Test Conference, 2018

Information Leakage Attacks on Emerging Non-Volatile Memory and Countermeasures.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Low Power Electronics and Design, 2018

Fault injection attacks on emerging non-volatile memory and countermeasures.

[BibT_eX]

[DOI]

Proceedings of the 7th International Workshop on Hardware and Architectural Support for Security and Privacy, 2018

Analysis of Row Hammer Attack on STTRAM.

[BibT_eX]

[DOI]

Proceedings of the 36th IEEE International Conference on Computer Design, 2018

CTCG: Charge-trap based camouflaged gates for reverse engineering prevention.

[BibT_eX]

[DOI]

Anirudh Iyengar

Sandeep Krishna Thirumala

Sung-Hao Lin

Sumeet Kumar Gupta

Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018

Novel application of spintronics in computing, sensing, storage and cybersecurity.

[BibT_eX]

[DOI]

Seyedhamidreza Motaman

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

Replacing eFlash with STTRAM in IoTs: Security Challenges and Solutions.

[BibT_eX]

[DOI]

Jongsun Park

J. Hardw. Syst. Secur., 2017

Side-Channel Attack on STTRAM Based Cache for Cryptographic Application.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Novel magnetic burn-in for retention testing of STTRAM.

[BibT_eX]

[DOI]

Anirudh Srikant Iyengar

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016

Multi-Bit Read and Write Methodologies for Diode-STTRAM Crossbar Array.

[BibT_eX]

[DOI]

Radha Krishna Aluru

Rashmi Jha

CoRR, 2016

Attack resilient architecture to replace embedded Flash with STTRAM in homogeneous IoTs.

[BibT_eX]

[DOI]

CoRR, 2016

Security and privacy threats to on-chip non-volatile memories and countermeasures.

[BibT_eX]

[DOI]