Mohammad Moradinezhad Maryan

Orcid: 0000-0003-2597-2079

According to our database1, Mohammad Moradinezhad Maryan authored at least 8 papers between 2017 and 2024.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

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Bibliography

2024
Low-Leakage Double-Body MOSFET: A Promising Circuit-Level Technique for Deep-Submicron Analog Integrated Circuit Design.
J. Circuits Syst. Comput., 2024

2022
A self-control leakage-suppression block for low-power high-efficient static logic circuit design in 22 nm CMOS process.
Integr., 2022

2021
An input controlled leakage restrainer transistor-based technique for leakage and short-circuit power reduction of 1-bit hybrid full adders.
Int. J. Circuit Theory Appl., 2021

A New Circuit-Level Technique for Leakage and Short-Circuit Power Reduction of Static Logic Gates in 22-nm CMOS Technology.
Circuits Syst. Signal Process., 2021

2020
Compact Design of High-Speed Low-Error Four-Quadrant Current Multiplier with Reduced Power Dissipation.
J. Circuits Syst. Comput., 2020

A high-precision current-mode multifunction analog cell suitable for computational signal processing.
Integr., 2020

2018
CMOS design of computational current-mode static and dynamic functions based on analog translinear cell.
Comput. Electr. Eng., 2018

2017
Ultra low-power low-voltage FGMOS based-configurable analog block for current-mode fractional-power functions.
Microelectron. J., 2017


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