Mohammad M. Mojarradi

According to our database1, Mohammad M. Mojarradi authored at least 16 papers between 2003 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2019
Testing and Modeling of a SAR ADC for Cryogenic Applications.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

2014
Challenge of developmental flight instrumentation for orion exploration flight test 1: Potential benefit of wireless technology for future Orion missions.
Proceedings of the 2014 IEEE International Conference on Wireless for Space and Extreme Environments, 2014

2010
A SiGe BiCMOS Instrumentation Channel for Extreme Environment Applications.
VLSI Design, 2010

2008
Self-Reconfigurable Mixed-Signal Integrated Circuits Architecture Comprising a Field Programmable Analog Array and a General Purpose Genetic Algorithm IP Core.
Proceedings of the Evolvable Systems: From Biology to Hardware, 2008

Design of a mask-programmable memory/multiplier array using G4-FET technology.
Proceedings of the 45th Design Automation Conference, 2008

Self-Reconfigurable Analog Array Integrated Circuit Architecture for Space Applications.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2008

2007
Adaptive and Evolvable Analog Electronics for Space Applications.
Proceedings of the Evolvable Systems: From Biology to Hardware, 2007

Self-Reconfigurable Analog Arrays: Off-The Shelf Adaptive Electronics for Space Applications.
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007

2006
A technique to increase the efficiency of high-voltage charge pumps.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

2005
Design technique of an on-chip, high-voltage charge pump in SOI.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Adaptive gate biasing: a new solution for body-driven current mirrors.
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

The G<sup>4</sup>-FET: a universal and programmable logic gate.
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

SOI four-gate transistors (G<sup>4</sup>-FETs) for high voltage analog applications.
Proceedings of the 31st European Solid-State Circuits Conference, 2005

A novel four-quadrant analog multiplier using SOI four-gate transistors (G<sup>4</sup>-FETs).
Proceedings of the 31st European Solid-State Circuits Conference, 2005

2004
A Low Voltage to High Voltage Level Shifter in a Low Voltage, 0.25 µm, PD SOI Process.
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004

2003
A high voltage Dickson charge pump in SOI CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003


  Loading...