Mohammad Javad Sharifi

Orcid: 0000-0002-7414-802X

According to our database1, Mohammad Javad Sharifi authored at least 9 papers between 2009 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2021
A Novel Architecture for Memristor-Based Logic.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

2019
Modeling forces between the probe of atomic microscope and the scanning surface.
Neural Comput. Appl., 2019

2018
Novel designs for digital gates based on single electron devices to overcome the traditional limitation on speed and bit error rate.
Microelectron. J., 2018

2016
A Multiloop and Full Amplitude Hysteresis Model for Molecular Electronics.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

2011
Introducing a technology index concept and optimum performance design procedure for single-electron-device based circuits.
Microelectron. J., 2011

A Theoretical Study of the Performance of a Single-Electron Transistor Buffer.
IEICE Trans. Electron., 2011

2010
New RTD-Based General Threshold Gate Topologies and Application to Three-Input XOR Logic Gates.
J. Electr. Comput. Eng., 2010

General SPICE Models for Memristor and Application to Circuit Simulation of Memristor-Based Synapses and Memory Cells.
J. Circuits Syst. Comput., 2010

2009
A New XOR Structure Based on Resonant-Tunneling High Electron Mobility Transistor.
VLSI Design, 2009


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