Mohammad H. Tehranipour

According to our database, Mohammad H. Tehranipour authored at least 14 papers between 2001 and 2005.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2005

RL-huffman encoding for test compression and power reduction in scan applications.

Mehrdad Nourani, Mohammad H. Tehranipour

ACM Trans. Design Autom. Electr. Syst., 2005

2004

Testing SoC interconnects for signal integrity using extended JTAG architecture.

Mohammad H. Tehranipour, Nisar Ahmed, Mehrdad Nourani

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

A Low-Cost At-Speed BIST Architecture for Embedded Processor and SRAM Cores.

Mohammad H. Tehranipour, Seid Mehdi Fakhraie, Zainalabedin Navabi, M. R. Movahedin

J. Electron. Test., 2004

Mixed RL-Huffman encoding for power reduction and data compression in scan test.

Mohammad H. Tehranipour, Mehrdad Nourani, Karim Arabi, Ali Afzali-Kusha

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Frequency driven repeater insertion for deep submicron.

Nisar Ahmed, Mohammad H. Tehranipour, Dian Zhou, Mehrdad Nourani

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Low power pattern generation for BIST architecture.

Nisar Ahmed, Mohammad H. Tehranipour, Mehrdad Nourani

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Nine-Coded Compression Technique with Application to Reduced Pin-Count Testing and Flexible On-Chip Decompression.

Mohammad H. Tehranipour, Mehrdad Nourani, Krishnendu Chakrabarty

Proceedings of the 2004 Design, 2004

2003

Testing SoC Interconnects for Signal Integrity Using Boundary Scan.

Mohammad H. Tehranipour, Nisar Ahmed, Mehrdad Nourani

Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003

Systematic test program generation for SoC testing using embedded processor.

Mohammad H. Tehranipour, Mehrdad Nourani, Seid Mehdi Fakhraie, Ali Afzali-Kusha

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

eUTDSP: a design study of a new VLIW-based DSP architecture.

G. R. Chaji, R. M. Pourrad, Seid Mehdi Fakhraie, Mohammad H. Tehranipour

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Multiple Transition Model and Enhanced Boundary Scan Architecture to Test Interconnects for Signal Integrity.

Mohammad H. Tehranipour, Nisar Ahmed, Mehrdad Nourani

Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

Extending JTAG for Testing Signal Integrity in SoCs.

Nisar Ahmed, Mohammad H. Tehranipour, Mehrdad Nourani

Proceedings of the 2003 Design, 2003

2002

Signal Integrity Loss in SoC's Interconnects: A Diagnosis Approach Using Embedded Microprocessor.

Mohammad H. Tehranipour, Mehrdad Nourani

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

2001

An efficient BIST method for testing of embedded SRAMs.

Mohammad H. Tehranipour, Zainalabedin Navabi, Seid Mehdi Fakhraie

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001