Mohammad Fattah

According to our database1, Mohammad Fattah authored at least 15 papers between 2009 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2016
A Power-Aware Approach for Online Test Scheduling in Many-Core Architectures.
IEEE Trans. Computers, 2016

2015
A Low-Overhead, Fully-Distributed, Guaranteed-Delivery Routing Algorithm for Faulty Network-on-Chips.
Proceedings of the 9th International Symposium on Networks-on-Chip, 2015

Power-aware online testing of manycore systems in the dark silicon era.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014
A task migration mechanism for distributed many-core operating systems.
J. Supercomput., 2014

Multi Rectangle Modeling Approach for Application Mapping on a Many-Core System.
Proceedings of the 22nd Euromicro International Conference on Parallel, 2014

Mixed-Criticality Run-Time Task Mapping for NoC-Based Many-Core Systems.
Proceedings of the 22nd Euromicro International Conference on Parallel, 2014

SHiFA: System-Level Hierarchy in Run-Time Fault-Aware Management of Many-Core Systems.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Adjustable contiguity of run-time task allocation in networked many-core systems.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013
Design space exploration of thermal-aware many-core systems.
J. Syst. Archit., 2013

Smart hill climbing for agile dynamic mapping in many-core systems.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012
Transport layer aware design of network interface in many-core systems.
Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012

CoNA: Dynamic application mapping for congestion reduction in many-core systems.
Proceedings of the 30th International IEEE Conference on Computer Design, 2012

2011
Exploration of MPSoC monitoring and management systems.
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

2010
A High Throughput Low Power FIFO Used for GALS NoC Buffers.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

2009
A Hazard-Free Delay-Insensitive 4-phase On-Chip Link Using MVCM Signaling.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009


  Loading...