Mohammad Faisal Amir

Orcid: 0000-0003-4277-754X

According to our database1, Mohammad Faisal Amir authored at least 11 papers between 2014 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
Cross-Layer Noise Analysis in Smart Digital Pixel Sensors With Integrated Deep Neural Network.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2020

Effect of Process Variations in Digital Pixel Circuits on the Accuracy of DNN based Smart Sensor.
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020

2019
Design methodology for 3d-stacked imaging systems with integrated deep learning.
PhD thesis, 2019

CAMEL: An Adaptive Camera With Embedded Machine Learning-Based Sensor Parameter Control.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2019

A Camera with Brain - Embedding Machine Learning in 3D Sensors.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
Edge-Host Partitioning of Deep Neural Networks with Feature Space Encoding for Resource-Constrained Internet-of-Things Platforms.
Proceedings of the 15th IEEE International Conference on Advanced Video and Signal Based Surveillance, 2018

2017
A Single-Chip Image Sensor Node With Energy Harvesting From a CMOS Pixel Array.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Energy-efficient neural image processing for Internet-of-Things edge devices.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

2016
Exploration of Si/Ge Tunnel FET Bit Cells for Ultra-low Power Embedded Memory.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2016

Reconfigurable 96×128 active pixel sensor with 2.1µW/mm<sup>2</sup> power generation and regulated multi-domain power delivery for self-powered imaging.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

2014
Ultra-low power electronics with Si/Ge tunnel FET.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014


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