Mohamed W. Hassan

According to our database, Mohamed W. Hassan authored at least 11 papers between 2013 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

High Throughput Massive MIMO Signal Decoding Using Multi-Level Tree Search on FPGAs.

Mohamed W. Hassan, Hatem Ltaief, Suhaib A. Fahmy

Proceedings of the 32nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2024

2023

Signal Detection for Large MIMO Systems Using Sphere Decoding on FPGAs.

Mohamed W. Hassan, Adel Dabah, Hatem Ltaief, Suhaib A. Fahmy

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

2021

Using Workload Characterization to Guide High Performance Graph Processing.

Mohamed W. Hassan

PhD thesis, 2021

Graph Analytics on Hybrid System (GAHS) Case Study: PageRank.

Mohamed W. Hassan, Peter M. Athanas

Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2021

Domain-Specific Modeling and Optimization for Graph Processing on FPGAs.

Mohamed W. Hassan, Peter M. Athanas, Yasser Y. Hanafy

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2021

2020

MetaCL: Automated "Meta" OpenCL Code Generation for High-Level Synthesis on FPGA.

Paul Sathre, Atharva Gondhalekar, Mohamed W. Hassan, Wu-Chun Feng

Proceedings of the 2020 IEEE High Performance Extreme Computing Conference, 2020

2019

C to D-Wave: A High-level C Compilation Framework for Quantum Annealers.

Mohamed W. Hassan, Scott Pakin, Wu-chun Feng

Proceedings of the 2019 IEEE High Performance Extreme Computing Conference, 2019

2018

Exploring FPGA-specific Optimizations for Irregular OpenCL Applications.

Mohamed W. Hassan, Ahmed E. Helal, Peter M. Athanas, Wu-Chun Feng, Yasser Y. Hanafy

Proceedings of the 2018 International Conference on ReConFigurable Computing and FPGAs, 2018

2017

Hardware accelerated SAT solvers - A survey.

Ali Asgar Sohanghpurwala, Mohamed W. Hassan, Peter Athanas

J. Parallel Distributed Comput., 2017

2015

High Performance Sparse LU Solver FPGA Accelerator Using a Static Synchronous Data Flow Model.

Mohamed W. Hassan, Ahmed E. Helal, Yasser Y. Hanafy

Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015

2013

NOA'S-Arc: NISC based, optimized array scalable architecture.

Mohamed Wasfy Hassan, Ahmed A. Abouel Farag, Yasser Y. Hanafy

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013