Mohamed Shalan

Orcid: 0000-0003-2255-6328

According to our database1, Mohamed Shalan authored at least 23 papers between 2000 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
RTL-Repo: A Benchmark for Evaluating LLMs on Large-Scale RTL Design Projects.
CoRR, 2024

2021
Real Silicon Using Open-Source EDA.
IEEE Des. Test, 2021

Fault: Open-Source EDA's Missing DFT Toolchain.
IEEE Des. Test, 2021

Digital ASIC Implementation of RISC-V: OpenLane and Commercial Approaches in Comparison.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

2020
Building OpenLANE: A 130nm OpenROAD-based Tapeout- Proven Flow : Invited Paper.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

DRiLLS: Deep Reinforcement Learning for Logic Synthesis.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019
Toward an Open-Source Digital Flow: First Learnings from the OpenROAD Project.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2017
CloudV: A cloud-based educational digital design environment.
Proceedings of the 2017 IEEE International Conference on Microelectronic Systems Education, 2017

A Statistical Approach to Resolve Conflicting Requirements in Pervasive Computing Systems.
Proceedings of the ENASE 2017, 2017

2015
On the Road to a Reference Architecture for Pervasive Computing.
Proceedings of the PECCS 2015, 2015

Embedded Hypervisor Xvisor: A Comparative Analysis.
Proceedings of the 23rd Euromicro International Conference on Parallel, 2015

2014
Energy-efficient task allocation techniques for asymmetric multiprocessor embedded systems.
ACM Trans. Embed. Comput. Syst., 2014

2013
Towards using Multimodal Features of Social Networks for Improved Contextual Emotion Detection.
Proceedings of the PECCS 2013, 2013

2012
Energy-Aware Task Partitioning on Heterogeneous Multiprocessor Platforms
CoRR, 2012

2011
A reconfigurable, pipelined, conflict directed jumping search SAT solver.
Proceedings of the Design, Automation and Test in Europe, 2011

2010
A novel conflict directed jumping algorithm for hardware-based SAT solvers.
Proceedings of the 5th International Design and Test Workshop, 2010

2009
A Reconfigurable Five-Stage Pipelined SAT Solver.
Proceedings of the 10th International Workshop on Microprocessor Test and Verification, 2009

2008
Hardware based algorithm for conflict diagnosis in SAT solver.
Proceedings of the 6th ACS/IEEE International Conference on Computer Systems and Applications, 2008

2007
Interactive presentation: A shift register based clause evaluator for reconfigurable SAT solver.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2003
Dynamic Memory Management for Embedded Real-Time Multiprocessor System-on-a-Chip.
PhD thesis, 2003

A Configurable Hardware Scheduler for Real-Time Systems.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, June 23, 2003

2002
Hardware support for real-time embedded multiprocessor system-on-a-chip memory management.
Proceedings of the Tenth International Symposium on Hardware/Software Codesign, 2002

2000
A dynamic memory management unit for embedded real-time system-on-a-chip.
Proceedings of the 2000 International Conference on Compilers, 2000


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