Mohamed F. Tolba

Orcid: 0000-0002-6412-290X

Affiliations:
  • Nile University, NISC Research Center, Giza, Egypt


According to our database1, Mohamed F. Tolba authored at least 36 papers between 2003 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Energy Efficient and Fast CNN Inference by Exploring Weight Approximation and Computational Reuse.
IEEE Trans. Artif. Intell., June, 2024

Hybrid Dynamic Pruning: A Pathway to Efficient Transformer Inference.
CoRR, 2024

2023
EACNN: Efficient CNN Accelerator Utilizing Linear Approximation and Computation Reuse.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Efficient CNN Hardware Architecture Based on Linear Approximation and Computation Reuse Technique.
Proceedings of the International Conference on Microelectronics, 2023

2022
Deep Neural Networks-Based Weight Approximation and Computation Reuse for 2-D Image Classification.
IEEE Access, 2022

Reduce Computing Complexity of Deep Neural Networks Through Weight Scaling.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Approximate Logarithmic Multiplier For Convolutional Neural Network Inference With Computational Reuse.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2021
A switched chaotic encryption scheme using multi-mode generalized modified transition map.
Multim. Tools Appl., 2021

C3PU: Cross-Coupling Capacitor Processing Unit Using Analog-Mixed Signal In-Memory Computing for AI Inference.
CoRR, 2021

DS2B: Dynamic and Secure Substitution Box for Efficient Speech Encryption Engine.
IEEE Access, 2021

C3PU: Cross-Coupling Capacitor Processing Unit Using Analog-Mixed Signal for AI Inference.
IEEE Access, 2021

2020
FPGA implementation of a chaotic oscillator with odd/even symmetry and its application.
Integr., 2020

FPGA-Based Memristor Emulator Circuit for Binary Convolutional Neural Networks.
IEEE Access, 2020

Generalized Formula for Generating N-Scroll Chaotic Attractors.
Proceedings of the 2nd Novel Intelligent and Leading Emerging Sciences Conference, 2020

2019
FPGA Implementation of the Fractional Order Integrator/Differentiator: Two Approaches and Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Memristor FPGA IP Core Implementation for Analog and Digital Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

FPGA realization of a speech encryption system based on a generalized modified chaotic transition map and bit permutation.
Multim. Tools Appl., 2019

Synchronization and FPGA realization of fractional-order Izhikevich neuron model.
Microelectron. J., 2019

FPGA implementation of sound encryption system based on fractional-order chaotic systems.
Microelectron. J., 2019

Digital Emulation of a Versatile Memristor With Speech Encryption Application.
IEEE Access, 2019

Generic Hardware of Fractional Order Multi-Scrolls Chaotic Generator Based on FPGA.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

Speech Encryption on FPGA Using a Chaotic Generator and S-Box Table.
Proceedings of the Fourth International Conference on Advances in Computational Tools for Engineering Applications, 2019

2018
Chaos-based hardware speech encryption scheme using modified tent map and bit permutation.
Proceedings of the 7th International Conference on Modern Circuits and Systems Technologies, 2018

FPGA implementation of fractional-order Chua's chaotic system.
Proceedings of the 7th International Conference on Modern Circuits and Systems Technologies, 2018

FPGA Implementation of X- and Heart-shapes Controllable Multi-Scroll Attractors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Hardware Speech Encryption Using a Chaotic Generator, Dynamic Shift and Bit Permutation.
Proceedings of the 30th International Conference on Microelectronics, 2018

Security and Efficiency of Feistel Networks Versus Discrete Chaos for Lightweight Speech Encryption.
Proceedings of the 30th International Conference on Microelectronics, 2018

FPGA Speech Encryption Realization Based on Variable S-Box and Memristor Chaotic Circuit.
Proceedings of the 30th International Conference on Microelectronics, 2018

FPGA realization of speech encryption based on modified chaotic logistic map.
Proceedings of the IEEE International Conference on Industrial Technology, 2018

Speech encryption using generalized modified chaotic logistic and tent maps.
Proceedings of the IEEE International Conference on Industrial Technology, 2018

Permutation-Only FPGA Realization of Real-Time Speech Encryption.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2017
FPGA realization of Caputo and Grünwald-Letnikov operators.
Proceedings of the 6th International Conference on Modern Circuits and Systems Technologies, 2017

FPGA implementation of fractional-order integrator and differentiator based on Grünwald Letnikov's definition.
Proceedings of the 29th International Conference on Microelectronics, 2017

2016
FPGA realization of ALU for mobile GPU.
Proceedings of the 3rd International Conference on Advances in Computational Tools for Engineering Applications, 2016

2014
High speed special function unit for graphics processing unit.
Proceedings of the 9th International Design and Test Symposium, 2014

2003
Segmentation Free Approach for Printed Arabic Text Recognition.
Int. J. Comput. Their Appl., 2003


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