Mohamed Boubaker

Orcid: 0000-0003-4188-2399

According to our database1, Mohamed Boubaker authored at least 10 papers between 2010 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2023
A Parallel Reconfigurable Architecture for Scalable LVQ Neural Networks.
Neural Process. Lett., June, 2023

2018
LVQ neural network optimized implementation on FPGA devices with multiple-wordlength operations for real-time systems.
Neural Comput. Appl., 2018

2017
Implementation of a low-power LVQ architecture on FPGA.
IET Circuits Devices Syst., 2017

Parallelism Hardware Computation for Artificial Neural Network.
Proceedings of the 14th IEEE/ACS International Conference on Computer Systems and Applications, 2017

2014
Integration of Optimization Approach Based on Multiple Wordlength Operation Grouping in the AAA Methodology for Real-Time Systems: LVQ Implementation.
Int. J. Embed. Real Time Commun. Syst., 2014

2012
Power estimation model based on grouping components in field-programmable gate array circuit.
IET Circuits Devices Syst., 2012

Analytical dynamic power model for LUT based components.
Proceedings of the 7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2012

2010
Implementation of an LVQ neural network with a variable size: algorithmic specification, architectural exploration and optimized implementation on FPGA devices.
Neural Comput. Appl., 2010

Implementation of a novel LVQ neural network architecture on FPGA.
Int. J. Artif. Intell. Soft Comput., 2010

Hedi: Multi-width fixed-point coding based on reprogrammable hardware implementation of a multi-layer perceptron neural network for alertness classification.
Proceedings of the 10th International Conference on Intelligent Systems Design and Applications, 2010


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