Mohamed Badr Younis

Affiliations:
  • University of Illinois at Urbana-Champaign, Urbana, IL, USA


According to our database1, Mohamed Badr Younis authored at least 5 papers between 2022 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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Links

Online presence:

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Bibliography

2024
7.8 A 69.3fs Ring-Based Sampling-PLL Achieving 6.8GHz-14GHz and -54.4dBc Spurs Under 50mV Supply Noise.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023
A 20-μs Turn-On Time, 24-kHz Resolution, 1.5-100-MHz Digitally Programmable Temperature-Compensated Clock Generator.
IEEE J. Solid State Circuits, March, 2023

A 5.2 Gb/s 3 mm Air-Gap 4.7 pJ/bit Capacitively-Coupled Transceiver for Giant Video Walls Enabled by a Dual-Edge Tracking Clock and Data Recovery Loop.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

A Carrier-Phase-Recovery Loop for a 3.2pJ/b 24Gb/s QPSK Coherent Optical Receiver.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2022
A 20µs turn-on time, 24kHz resolution, 1.5-100MHz digitally programmable temperature-compensated clock generator with 7.5ppm/°C inaccuracy.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022


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