Mohamed Assem Ibrahim

Orcid: 0000-0002-4129-0310

According to our database1, Mohamed Assem Ibrahim authored at least 13 papers between 2017 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

Online presence:

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Bibliography

2024
Balanced Data Placement for GEMV Acceleration with Processing-In-Memory.
CoRR, 2024

JIT-Q: Just-in-time Quantization with Processing-In-Memory for Efficient ML Training.
Proceedings of the Seventh Annual Conference on Machine Learning and Systems, 2024

2023
Just-in-time Quantization with Processing-In-Memory for Efficient ML Training.
CoRR, 2023

Inclusive-PIM: Hardware-Software Co-design for Broad Acceleration on Commercial PIM Architectures.
CoRR, 2023

Collaborative Acceleration for FFT on Commercial Processing-In-Memory Architectures.
CoRR, 2023

2021
Efficient Cache Utilization via Model-aware Data Placement for Recommendation Models.
Proceedings of the MEMSYS 2021: The International Symposium on Memory Systems, Washington, USA, September 27, 2021

Analyzing and Leveraging Decoupled L1 Caches in GPUs.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

2020
Analyzing and Leveraging Shared L1 Caches in GPUs.
Proceedings of the PACT '20: International Conference on Parallel Architectures and Compilation Techniques, 2020

2019
Address-stride assisted approximate load value prediction in GPUs.
Proceedings of the ACM International Conference on Supercomputing, 2019

Analyzing and Leveraging Remote-Core Bandwidth for Enhanced Performance in GPUs.
Proceedings of the 28th International Conference on Parallel Architectures and Compilation Techniques, 2019

2018
Architectural Support for Efficient Large-Scale Automata Processing.
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

Efficient and Fair Multi-programming in GPUs via Effective Bandwidth Management.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

2017
Controlled Kernel Launch for Dynamic Parallelism in GPUs.
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017


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