Mohamed Anane

According to our database1, Mohamed Anane authored at least 16 papers between 2008 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Novel area-efficient and flexible architectures for optimal Ate pairing on FPGA.
J. Supercomput., January, 2024

2022
Efficient and Scalable Hardware Implementation of Montgomery Modular Multiplication.
J. Circuits Syst. Comput., 2022

2021
i-DERASSA: e-learning Platform based on Augmented and Virtual Reality interaction for Education and Training.
Proceedings of the 2021 International Conference on Artificial Intelligence for Cyber Security Systems and Privacy (AI-CSP), 2021

2019
Efficient PSoC Implementation of Modular Multiplication and Exponentiation Based on Serial-Parallel Combination.
J. Circuits Syst. Comput., 2019

MicroBlaze-Based Multiprocessor Embedded Cryptosystem on FPGA for Elliptic Curve Scalar Multiplication Over Fp.
J. Circuits Syst. Comput., 2019

2015
FPGA implementation of scalar multiplication over Fp for elliptic curve cryptosystem.
Proceedings of the 10th International Design & Test Symposium, 2015

SHA-2 hardware core for virtex-5 FPGA.
Proceedings of the 12th IEEE International Multi-Conference on Systems, Signals & Devices, 2015

AES IP for hybrid cryptosystem RSA-AES.
Proceedings of the 12th IEEE International Multi-Conference on Systems, Signals & Devices, 2015

2014
Software/Hardware Co-Design of Modular Exponentiation for Efficient RSA Cryptosystem.
J. Circuits Syst. Comput., 2014

High throughput parallel montgomery modular exponentiation on FPGA.
Proceedings of the 9th International Design and Test Symposium, 2014

2013
High radix montgomery modular multiplication on FPGA.
Proceedings of the 8th International Design and Test Symposium, 2013

FPGA implementation of the m-ary modular exponentiation.
Proceedings of the 8th International Design and Test Symposium, 2013

2011
An optimised architecture for radix-2 Montgomery modular multiplication on FPGA.
Int. J. High Perform. Syst. Archit., 2011

2009
Hardware algorithm for variable precision multiplication on FPGA.
Proceedings of the 7th IEEE/ACS International Conference on Computer Systems and Applications, 2009

Reconfigurable architecture for elementary functions evaluation.
Proceedings of the 7th IEEE/ACS International Conference on Computer Systems and Applications, 2009

2008
Higher Radix and Redundancy Factor for Floating Point SRT Division.
IEEE Trans. Very Large Scale Integr. Syst., 2008


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