Mohamed Abdelsalam
Orcid: 0000-0001-5545-0621
According to our database1,
Mohamed Abdelsalam
authored at least 35 papers
between 2010 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
A Proposed Model for Improving the Reliability of Online Exam Results Using Blockchain.
IEEE Access, 2024
Model-Based Security Analysis of Interconnected Subsystems: A Methodology for Security Compatibility Evaluation.
Proceedings of the 21st Annual International Conference on Privacy, Security and Trust, 2024
2023
A digital twin prototype for traffic sign recognition of a learning-enabled autonomous vehicle.
Proceedings of the Companion Proceedings of the 16th IFIP WG 8.1 Working Conference on the Practice of Enterprise Modeling and the 13th Enterprise Design and Engineering Working Conference: BES, DTE, FACETE, Tools & Demos, Forum, EDEN Doctoral Consortium co-located with PoEM 2023, Vienna, Austria, November 28, 2023
C-TAR: A Compositional Threat Analysis and Risk Assessment Method for Infrastructure-Based Autonomous Driving.
Proceedings of the Computer Security. ESORICS 2023 International Workshops, 2023
2022
Des. Autom. Embed. Syst., December, 2022
3D Adapted Random Forest Vision (3DARFV) for Untangling Heterogeneous-Fabric Exceeding Deep Learning Semantic Segmentation Efficiency at the Utmost Accuracy.
CoRR, 2022
Towards a Digital Twin Architecture with Formal Analysis Capabilities for Learning-Enabled Autonomous Systems.
Proceedings of the Modelling and Simulation for Autonomous Systems, 2022
A Reusable UVM-SystemC Verification Environment for Simulation, Hardware Emulation, and FPGA Prototyping: Case Studies.
Proceedings of the International Conference on Microelectronics, 2022
2021
Improving security of the Internet of Things via RF fingerprinting based device identification system.
Neural Comput. Appl., 2021
Using Path Planning Algorithms and Digital Twin Simulators to Collect Synthetic Training Dataset for Drone Autonomous Navigation.
Proceedings of the 28th IEEE International Conference on Electronics, 2021
An Automated Flow for Configuration and Generation of CNN based AI accelerators for HW Emulation & FPGA Prototyping.
Proceedings of the 28th IEEE International Conference on Electronics, 2021
2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Usability Study of a comprehensive table tennis AR-based training system with the focus on players' strokes.
J. Ubiquitous Syst. Pervasive Networks, 2020
IPingPong: A Real-time Performance Analyzer System for Table Tennis Stroke's Movements.
Proceedings of the 17th International Conference on Mobile Systems and Pervasive Computing (MobiSPC 2020) / The 15th International Conference on Future Networks and Communications (FNC-2020) / The 10th International Conference on Sustainable Energy Information Technology, 2020
Online detection and classification of in-corrected played strokes in table tennis using IR depth camera.
Proceedings of the 11th International Conference on Ambient Systems, 2020
2019
J. Circuits Syst. Comput., 2019
Proceedings of the International Conference on Communications, 2019
2018
Proceedings of the 26th Euromicro International Conference on Parallel, 2018
Proceedings of the 11th International Workshop on Network on Chip Architectures, 2018
Virtual Electronic Control Unit as a Functional Mockup Unit for Heterogeneous Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE 8th Annual Computing and Communication Workshop and Conference, 2018
2017
Proceedings of the 10th International Workshop on Network on Chip Architectures, 2017
Smart auto-correction methodology using assertions and dynamic partial reconfiguration.
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017
2016
Proceedings of the 17th International Workshop on Microprocessor and SOC Test and Verification, 2016
NVMe Solid State Drive verification solution using HW Emulation and Virtual Device Technologies.
Proceedings of the 11th International Design & Test Symposium, 2016
Synthesizable SVA protocol checker generation methodology based on TDML and VCD file formats.
Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2016
2015
SoC verification platforms using HW emulation and co-modeling Testbench technologies.
Proceedings of the 10th International Design & Test Symposium, 2015
Proceedings of the 2015 IEEE International Conference on Electronics, 2015
2014
Proceedings of the 15th International Microprocessor Test and Verification Workshop, 2014
2013
Proceedings of the 8th International Design and Test Symposium, 2013
Proceedings of the 2013 Forum on specification and Design Languages, 2013
2012
Proceedings of the IEEE 25th International SOC Conference, 2012
2011
Proceedings of the 12th International Workshop on Microprocessor Test and Verification, 2011
A novel approach for system level synthesis of multi-core system architectures from TPG models.
Proceedings of the 9th IEEE/ACS International Conference on Computer Systems and Applications, 2011
2010
Supporting circuitry for a fully integrated micro electro mechanical (MEMS) oscillator in 45 nm CMOS technology.
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010