Mohab Anis
According to our database1,
Mohab Anis
authored at least 89 papers
between 2000 and 2016.
Collaborative distances:
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Bibliography
2016
Model-Based Initial Bias (MIB): Toward a Single-Iteration Optical Proximity Correction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016
2013
IEEE Trans. Very Large Scale Integr. Syst., 2013
Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013
Negative capacitance circuits for process variations compensation and timing yield improvement.
Proceedings of the 20th IEEE International Conference on Electronics, 2013
2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
Microelectron. J., 2012
Timing yield analysis considering process-induced temperature and supply voltage variations.
Microelectron. J., 2012
AIR (Aerial Image Retargeting): A novel technique for in-fab automatic model-based retargeting-for-yield.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
2011
A Bias-Dependent Model for the Impact of Process Variations on the SRAM Soft Error Immunity.
IEEE Trans. Very Large Scale Integr. Syst., 2011
A Novel Low Area Overhead Direct Adaptive Body Bias (D-ABB) Circuit for Die-to-Die and Within-Die Variations Compensation.
IEEE Trans. Very Large Scale Integr. Syst., 2011
Analytical Soft Error Models Accounting for Die-to-Die and Within-Die Variations in Sub-Threshold SRAM Cells.
IEEE Trans. Very Large Scale Integr. Syst., 2011
IEEE Trans. Very Large Scale Integr. Syst., 2011
Adaptive Body Bias for Reducing the Impacts of NBTI and Process Variations on 6T SRAM Cells.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
Novel Timing Yield Improvement Circuits for High-Performance Low-Power Wide Fan-In Dynamic OR Gates.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
IEEE Trans. Circuits Syst. II Express Briefs, 2011
Guest Editorial Special Section on 2010 IEEE Custom Integrated Circuits Conference (CICC 2010).
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
Microelectron. J., 2011
A comparative analysis between FinFET Semi-Dynamic Flip-Flop topologies under process variations.
Proceedings of the International Conference on Energy Aware Computing, 2011
2010
IEEE Trans. Very Large Scale Integr. Syst., 2010
IEEE Trans. Very Large Scale Integr. Syst., 2010
IEEE Trans. Very Large Scale Integr. Syst., 2010
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
A Design-Oriented Soft Error Rate Variation Model Accounting for Both Die-to-Die and Within-Die Variations in Submicrometer CMOS SRAM Cells.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
Advanced Variance Reduction and Sampling Techniques for Efficient Statistical Timing Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
J. Low Power Electron., 2010
Appl. Soft Comput., 2010
Statistical timing yield improvement of dynamic circuits using negative capacitance technique.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Comparative analysis of power yield improvement under process variation of sub-threshold flip-flops.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Scaling analysis of yield optimization considering supply and threshold voltage variations.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010
Correlation controlled sampling for efficient variability analysis of analog circuits.
Proceedings of the Design, Automation and Test in Europe, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
2009
IEEE Trans. Very Large Scale Integr. Syst., 2009
Introduction to the special issue on the 2007 International Conference on Microelectronics.
Microelectron. J., 2009
Comparative Analysis of Timing Yield Improvement under Process Variations of Flip-Flops Circuits.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009
2008
A Comparative Study Between Static and Dynamic Sleep Signal Generation Techniques for Leakage Tolerant Designs.
IEEE Trans. Very Large Scale Integr. Syst., 2008
Statistical Thermal Profile Considering Process Variations: Analysis and Applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
A Statistical Design-Oriented Delay Variation Model Accounting for Within-Die Variations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
On efficient Monte Carlo-based statistical static timing analysis of digital circuits.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008
Proceedings of the ESSCIRC 2008, 2008
Proceedings of the ESSCIRC 2008, 2008
Proceedings of the 45th Design Automation Conference, 2008
2007
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
2006
Microelectron. J., 2006
Microelectron. J., 2006
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006
Variability-aware device optimization under I<sub>ON</sub> and leakage current constraints.
Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
2005
IEEE Trans. Very Large Scale Integr. Syst., 2005
IEEE Trans. Very Large Scale Integr. Syst., 2005
Integr., 2005
A Low-Power Partitioning Methodology by Maximizing Sleep Time and Minimizing Cut Nets.
Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005
Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005
Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005
Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005
Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005
Proceedings of the 2005 Design, 2005
Proceedings of the 2005 Design, 2005
2004
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004
2003
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003
2002
Energy-efficient noise-tolerant dynamic styles for scaled-down CMOS and MTCMOS technologies.
IEEE Trans. Very Large Scale Integr. Syst., 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Dynamic and leakage power reduction in MTCMOS circuits using an automated efficient gate clustering technique.
Proceedings of the 39th Design Automation Conference, 2002
2000
Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000