Mitsuru Hamada

According to our database1, Mitsuru Hamada authored at least 15 papers between 1992 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2020
Mobile Device-Based Speech Enhancement System Using Lip-Reading.
Proceedings of the Distributed Computing and Artificial Intelligence, 2020

2016
ToA-based positioning system for industrial wireless LAN.
Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems, 2016

A secure and fast industrial WLAN system with zero-delay roaming.
Proceedings of the IEEE International Conference on Industrial Technology, 2016

2010
An Exposition of a Result in "Conjugate Codes for Secure and Reliable Information Transmission"
CoRR, 2010

Security of concatenated encoders for wiretap channels.
Proceedings of the IEEE International Symposium on Information Theory, 2010

2009
A polynomial-time construction of self-orthogonal codes and applications to quantum error correction.
Proceedings of the IEEE International Symposium on Information Theory, 2009

2008
Concatenated Quantum Codes Constructible in Polynomial Time: Efficient Decoding and Error Correction.
IEEE Trans. Inf. Theory, 2008

2007
Constructive Conjugate Codes for Quantum Error Correction and Cryptography
CoRR, 2007

2005
Information rates achievable with algebraic codes on quantum discrete memoryless channels.
IEEE Trans. Inf. Theory, 2005

2004
Reliability of Calderbank-Shor-Steane codes and security of quantum key distribution.
Proceedings of the 2004 IEEE International Symposium on Information Theory, 2004

2002
Lower bounds on the quantum capacity and highest error exponent of general memoryless channels.
IEEE Trans. Inf. Theory, 2002

2001
The burst weight distributions of maximum-hamming-distance-separable codes.
IEEE Trans. Inf. Theory, 2001

1999
Disjointness of Random Sequence Sets with Respect to Distinct Probability Measures.
IEEE Trans. Inf. Theory, 1999

1997
A Class of Error Control Codes for Byte Organized Memory Systems -SbEC-(Sb+S)ED Codes-.
IEEE Trans. Computers, 1997

1992
Single <i>b</i>-Bit Byte Error Correcting and Double Bit Error Detecting Codes for High-Speed Memory Systems.
Proceedings of the Digest of Papers: FTCS-22, 1992


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