Mitesh R. Meswani

According to our database, Mitesh R. Meswani authored at least 16 papers between 2010 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2017

Design and Analysis of an APU for Exascale Computing.

Thiruvengadam Vijayaraghavan, Yasuko Eckert, Gabriel H. Loh, Michael J. Schulte, Mike Ignatowski, Bradford M. Beckmann, William C. Brantley, Joseph L. Greathouse, Wei Huang, Arun Karunanithi, Onur Kayiran, Mitesh R. Meswani, Indrani Paul, Matthew Poremba, Steven Raasch, Steven K. Reinhardt, Greg Sadowski, Vilas Sridharan

Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

SILC-FM: Subblocked InterLeaved Cache-Like Flat Memory Organization.

Jee Ho Ryoo, Mitesh R. Meswani, Andreas Prodromou, Lizy K. John

Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

MemPod: A Clustered Architecture for Efficient and Scalable Migration in Flat Address Space Multi-level Memories.

Andreas Prodromou, Mitesh R. Meswani, Nuwan Jayasena, Gabriel H. Loh, Dean M. Tullsen

Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

HBM-Resident Prefetching for Heterogeneous Memory System.

Mahzabeen Islam, Krishna M. Kavi, Mitesh R. Meswani, Soumik Banerjee, Nuwan Jayasena

Proceedings of the Architecture of Computing Systems - ARCS 2017, 2017

2016

Prefetching as a Potentially Effective Technique for Hybrid Memory Optimization.

Mahzabeen Islam, Soumik Banerjee, Mitesh R. Meswani, Krishna M. Kavi

Proceedings of the Second International Symposium on Memory Systems, 2016

Reliability and Performance Trade-off Study of Heterogeneous Memories.

Manish Gupta, David Roberts, Mitesh R. Meswani, Vilas Sridharan, Dean M. Tullsen, Rajesh K. Gupta

Proceedings of the Second International Symposium on Memory Systems, 2016

POSTER: SILC-FM: Subblocked InterLeaved Cache-Like Flat Memory Organization.

Jee Ho Ryoo, Mitesh R. Meswani, Reena Panda, Lizy K. John

Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016

2015

Towards Workload-Aware Page Cache Replacement Policies for Hybrid Memories.

Ahsen J. Uppal, Mitesh R. Meswani

Proceedings of the 2015 International Symposium on Memory Systems, 2015

Heterogeneous memory architectures: A HW/SW approach for mixing die-stacked and off-package memories.

Mitesh R. Meswani, Sergey Blagodurov, David Roberts, John Slice, Mike Ignatowski, Gabriel H. Loh

Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

2014

Toward efficient programmer-managed two-level memory hierarchies in exascale computers.

Mitesh R. Meswani, Gabriel H. Loh, Sergey Blagodurov, David Roberts, John Slice, Mike Ignatowski

Proceedings of the 1st International Workshop on Hardware-Software Co-Design for High Performance Computing, 2014

Efficient breadth-first search on a heterogeneous processor.

Mayank Daga, Mark Nutter, Mitesh R. Meswani

Proceedings of the 2014 IEEE International Conference on Big Data (IEEE BigData 2014), 2014

2013

Modeling and predicting performance of high performance computing applications on hardware accelerators.

Mitesh R. Meswani, Laura Carrington, Didem Unat, Allan Snavely, Scott B. Baden, Stephen Poole

Int. J. High Perform. Comput. Appl., 2013

A new perspective on processing-in-memory architecture design.

Dong Ping Zhang, Nuwan Jayasena, Alexander Lyashevsky, Joseph L. Greathouse, Mitesh R. Meswani, Mark Nutter, Mike Ignatowski

Proceedings of the ACM SIGPLAN Workshop on Memory Systems Performance and Correctness, 2013

2011

Modeling and predicting application performance on hardware accelerators.

Mitesh R. Meswani, Laura Carrington, Didem Unat, Allan Snavely, Scott B. Baden, Stephen Poole

Proceedings of the 2011 IEEE International Symposium on Workload Characterization, 2011

Reducing Energy Usage with Memory and Computation-Aware Dynamic Frequency Scaling.

Michael Laurenzano, Mitesh R. Meswani, Laura Carrington, Allan Snavely, Mustafa M. Tikir, Stephen Poole

Proceedings of the Euro-Par 2011 Parallel Processing - 17th International Conference, 2011

2010

PIR: PMaC's Idiom Recognizer.

Catherine Olschanowsky, Allan Snavely, Mitesh R. Meswani, Laura Carrington

Proceedings of the 39th International Conference on Parallel Processing, 2010