Mitaro Namiki

According to our database, Mitaro Namiki authored at least 65 papers between 1991 and 2021.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2021

M-KUBOS/PYNQ Cluster for multi-access edge computing.

Takumi Inage, Kazuei Hironaka, Kensuke Iizuka, Kohei Ito, Yasuyu Fukushima, Mitaro Namiki, Hideharu Amano

Proceedings of the Ninth International Symposium on Computing and Networking, 2021

2019

A Software-based NVM Emulator Supporting Read/Write Asymmetric Latencies.

Atsushi Koshiba, Takahiro Hirofuchi, Ryousei Takano, Mitaro Namiki

IEICE Trans. Inf. Syst., 2019

A Preliminary Evaluation of Building Block Computing Systems.

Sayaka Terashima, Takuya Kojima, Hayate Okuhara, Kazusa Musha, Hideharu Amano, Ryuichi Sakamoto, Masaaki Kondo, Mitaro Namiki

Proceedings of the 13th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2019

2018

Reactive NaN Repair for Applying Approximate Memory to Numerical Applications.

Shinsuke Hamada, Soramichi Akiyama, Mitaro Namiki

CoRR, 2018

OpenCL Runtime for OS-Driven Task Pipelining on Heterogeneous Accelerators.

Atsushi Koshiba, Ryuichi Sakamoto, Mitaro Namiki

Proceedings of the 24th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2018

End-to-End Delay Model for Remote Surveillance over Internet and Mobile Networks.

May Takada, Mitaro Namiki

Proceedings of the 2018 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), 2018

Design and development of bit arrow: a web-based programming learning environment.

Kazuhei Nagashima, Shinya Cho, Masayuki Horikoshi, Hiroki Manabe, Susumu Kanemune, Mitaro Namiki

Proceedings of the 10th International Conference on Education Technology and Computers, 2018

TEE-KV: Secure Immutable Key-Value Store for Trusted Execution Environments.

Atsushi Koshiba, Ying Yan, Zhongxin Guo, Mitaro Namiki, Lidong Zhou

Proceedings of the ACM Symposium on Cloud Computing, 2018

2017

Towards write-back aware software emulator for non-volatile memory.

Atsushi Koshiba, Takahiro Hirofuchi, Soramichi Akiyama, Ryousei Takano, Mitaro Namiki

Proceedings of the IEEE 6th Non-Volatile Memory Systems and Applications Symposium, 2017

Building block operating system for 3D stacked computer systems with inductive coupling interconnect.

Shinsuke Hamada, Atsushi Koshiba, Mitaro Namiki, Hideharu Amano

Proceedings of the International SoC Design Conference, 2017

Building block multi-chip systems using inductive coupling through chip interface.

Hideharu Amano, Tadahiro Kuroda, Hiroshi Nakamura, Kimiyoshi Usami, Masaaki Kondo, Hiroki Matsutani, Mitaro Namiki

Proceedings of the International SoC Design Conference, 2017

2016

An Operating System Guided Fine-Grained Power Gating Control Based on Runtime Characteristics of Applications.

Atsushi Koshiba, Mikiko Sato, Kimiyoshi Usami, Hideharu Amano, Ryuichi Sakamoto, Masaaki Kondo, Hiroshi Nakamura, Mitaro Namiki

IEICE Trans. Electron., 2016

2015

A Fine-Grained Power Gating Control on Linux Monitoring Power Consumption of Processor Functional Units.

Atsushi Koshiba, Motoki Wada, Ryuichi Sakamoto, Mikiko Sato, Tsubasa Kosaka, Kimiyoshi Usami, Hideharu Amano, Masaaki Kondo, Hiroshi Nakamura, Mitaro Namiki

IEICE Trans. Electron., 2015

2014

Design of Multiple PVAS on InfiniBand Cluster System Consisting of Many-core and Multi-core.

Mikiko Sato, Go Fukazawa, Akio Shimada, Atsushi Hori, Yutaka Ishikawa, Mitaro Namiki

Proceedings of the 21st European MPI Users' Group Meeting, 2014

Multithreaded Two-Phase I/O: Improving Collective MPI-IO Performance on a Lustre File System.

Yuichi Tsujita, Kazumi Yoshinaga, Atsushi Hori, Mikiko Sato, Mitaro Namiki, Yutaka Ishikawa

Proceedings of the 22nd Euromicro International Conference on Parallel, 2014

Unbalanced buffer tree synthesis to suppress ground bounce for fine-grain power gating.

Kimiyoshi Usami, Makoto Miyauchi, Masaru Kudo, Kazumitsu Takagi, Hideharu Amano, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura

Proceedings of the 2014 International Symposium on System-on-Chip, 2014

pmqFlow: Design of propagation time measuring QoS system with OpenFlow for process automation.

Hiroshi Miyata, Mitaro Namiki, Mikiko Sato

Proceedings of the IECON 2014 - 40th Annual Conference of the IEEE Industrial Electronics Society, Dallas, TX, USA, October 29, 2014

First results of performance comparisons on many-core processors in solving QAP with ACO: kepler GPU versus xeon PHI.

Mikiko Sato, Shigeyoshi Tsutsui, Noriyuki Fujimoto, Yuji Sato, Mitaro Namiki

Proceedings of the Genetic and Evolutionary Computation Conference, 2014

Design and evaluation of fine-grained power-gating for embedded microprocessors.

Masaaki Kondo, Hiroaki Kobayashi, Ryuichi Sakamoto, Motoki Wada, Jun Tsukamoto, Mitaro Namiki, Weihan Wang, Hideharu Amano, Kensaku Matsunaga, Masaru Kudo, Kimiyoshi Usami, Toshiya Komoda, Hiroshi Nakamura

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

A fine grained power management supported by just-in-time compiler.

Motoki Wada, Mikiko Sato, Mitaro Namiki

Proceedings of the 2014 IEEE Symposium on Low-Power and High-Speed Chips, 2014

Design and control methodology for fine grain power gating based on energy characterization and code profiling of microprocessors.

Kimiyoshi Usami, Masaru Kudo, Kensaku Matsunaga, Tsubasa Kosaka, Yoshihiro Tsurui, Weihan Wang, Hideharu Amano, Hiroaki Kobayashi, Ryuichi Sakamoto, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013

A Scalable 3D Heterogeneous Multicore with an Inductive ThruChip Interface.

Noriyuki Miura, Yusuke Koizumi, Yasuhiro Take, Hiroki Matsutani, Tadahiro Kuroda, Hideharu Amano, Ryuichi Sakamoto, Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo, Hiroshi Nakamura

IEEE Micro, 2013

Fine-Grained Run-Tume Power Gating through Co-optimization of Circuit, Architecture, and System Software Design.

Hiroshi Nakamura, Weihan Wang, Yuya Ohta, Kimiyoshi Usami, Hideharu Amano, Masaaki Kondo, Mitaro Namiki

IEICE Trans. Electron., 2013

Improving Parallel I/O Performance Using Multithreaded Two-Phase I/O with Processor Affinity Management.

Yuichi Tsujita, Kazumi Yoshinaga, Atsushi Hori, Mikiko Sato, Mitaro Namiki, Yutaka Ishikawa

Proceedings of the Parallel Processing and Applied Mathematics, 2013

A Delegation Mechanism on Many-Core Oriented Hybrid Parallel Computers for Scalability of Communicators and Communications in MPI.

Kazumi Yoshinaga, Yuichi Tsujita, Atsushi Hori, Mikiko Sato, Mitaro Namiki, Yutaka Ishikawa

Proceedings of the 21st Euromicro International Conference on Parallel, 2013

sQoS: The design and prototyping of secure QoS for process automation system.

Hiroshi Miyata, Mitaro Namiki, Mikiko Sato

Proceedings of the IECON 2013, 2013

A scalable 3D heterogeneous multi-core processor with inductive-coupling thruchip interface.

Noriyuki Miura, Yusuke Koizumi, Eiichi Sasaki, Yasuhiro Take, Hiroki Matsutani, Tadahiro Kuroda, Hideharu Amano, Ryuichi Sakamoto, Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo, Hiroshi Nakamura

Proceedings of the 2013 IEEE Hot Chips 25 Symposium (HCS), 2013

Demonstration of a heterogeneous multi-core processor with 3-D inductive coupling links.

Yusuke Koizumi, Noriyuki Miura, Yasuhiro Take, Hiroki Matsutani, Tadahiro Kuroda, Hideharu Amano, Ryuichi Sakamoto, Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo, Hiroshi Nakamura

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

Hardware support for resource partitioning in real-time embedded systems.

Tetsuro Honmura, Yuki Kondo, Tetsuya Yamada, Masashi Takada, Takumi Nitoh, Tohru Nojiri, Keisuke Toyama, Yasuhiko Saitoh, Hirofumi Nishi, Mikiko Sato, Mitaro Namiki

Proceedings of the 2013 IEEE Symposium on Low-Power and High-Speed Chips, 2013

2012

Geyser.

Hiroshi Sasaki, Hideharu Amano, Kimiyoshi Usami, Masaaki Kondo, Mitaro Namiki, Hiroshi Nakamura

Proceedings of the Handbook of Energy-Aware and Green Computing - Two Volume Set., 2012

An OpenCL Runtime Library for Embedded Multi-Core Accelerator.

Ryuichi Sakamoto, Mikiko Sato, Yusuke Koizumi, Hideharu Amano, Mitaro Namiki

Proceedings of the 2012 IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2012

Delegation-Based MPI Communications for a Hybrid Parallel Computer with Many-Core Architecture.

Kazumi Yoshinaga, Yuichi Tsujita, Atsushi Hori, Mikiko Sato, Mitaro Namiki, Yutaka Ishikawa

Proceedings of the Recent Advances in the Message Passing Interface, 2012

An Efficient Kernel-Level Blocking MPI Implementation.

Atsushi Hori, Toyohisa Kameyama, Yuichi Tsujita, Mitaro Namiki, Yutaka Ishikawa

Proceedings of the Recent Advances in the Message Passing Interface, 2012

A design of hybrid operating system for a parallel computer with multi-core and many-core processors.

Mikiko Sato, Go Fukazawa, Kiyohiko Nagamine, Ryuichi Sakamoto, Mitaro Namiki, Kazumi Yoshinaga, Yuichi Tsujita, Atsushi Hori, Yutaka Ishikawa

Proceedings of the 2nd International Workshop on Runtime and Operating Systems for Supercomputers, 2012

Dynamic power control with a heterogeneous multi-core system using a 3-D wireless inductive coupling interconnect.

Yusuke Koizumi, Hideharu Amano, Hiroki Matsutani, Noriyuki Miura, Tadahiro Kuroda, Ryuichi Sakamoto, Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo, Hiroshi Nakamura

Proceedings of the 2012 International Conference on Field-Programmable Technology, 2012

CMA-Cube: A scalable reconfigurable accelerator with 3-D wireless inductive coupling interconnect.

Yusuke Koizumi, Eiichi Sasaki, Hideharu Amano, Hiroki Matsutani, Yasuhiro Take, Tadahiro Kuroda, Ryuichi Sakamoto, Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo, Hiroshi Nakamura

Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

2011

Cool Mega-Arrays: Ultralow-Power Reconfigurable Accelerator Chips.

Nobuaki Ozaki, Yoshihiro Yasuda, Mai Izawa, Yoshiki Saito, Daisuke Ikebuchi, Hideharu Amano, Hiroshi Nakamura, Kimiyoshi Usami, Mitaro Namiki, Masaaki Kondo

IEEE Micro, 2011

Design and Implementation Fine-grained Power Gating on Microprocessor Functional Units.

Zhao Lei, Daisuke Ikebuchi, Kimiyoshi Usami, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura, Hideharu Amano

IPSJ Trans. Syst. LSI Des. Methodol., 2011

A Leakage Efficient Data TLB Design for Embedded Processors.

Lei Zhao, Hui Xu, Daisuke Ikebuchi, Tetsuya Sunata, Mitaro Namiki, Hideharu Amano

IEICE Trans. Inf. Syst., 2011

A Leakage Efficient Instruction TLB Design for Embedded Processors.

Zhao Lei, Hui Xu, Daisuke Ikebuchi, Tetsuya Sunata, Mitaro Namiki, Hideharu Amano

IEICE Trans. Inf. Syst., 2011

CS Unplugged Assisted by Digital Materials for Handicapped People at Schools.

Hiroki Manabe, Susumu Kanemune, Mitaro Namiki, Yoshiaki Nakano

Proceedings of the Informatics in Schools. Contributing to 21st Century Education, 2011

Acceleration experiment of genetic computations for sudoku solution on multi-core processors.

Mikiko Sato, Yuji Sato, Mitaro Namiki

Proceedings of the 13th Annual Genetic and Evolutionary Computation Conference, 2011

Cool Mega-Array: A highly energy efficient reconfigurable accelerator.

Nobuaki Ozaki, Yoshihiro Yasuda, Yoshiki Saito, Daisuke Ikebuchi, Masayuki Kimura, Hideharu Amano, Hiroshi Nakamura, Kimiyoshi Usami, Mitaro Namiki, Masaaki Kondo

Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011

SLD-1(Silent Large Datapath): A ultra low power reconfigurable accelerator.

Nobuaki Ozaki, Kimiyoshi Usami, Hideharu Amano, Mitaro Namiki, Hiroshi Nakamura, Masaaki Kondo

Proceedings of the 2011 IEEE Symposium on Low-Power and High-Speed Chips, 2011

Geyser-2: The second prototype CPU with fine-grained run-time power gating.

Lei Zhao, Daisuke Ikebuchi, Yoshiki Saito, M. Kamata, Naomi Seki, Yu Kojima, Hideharu Amano, Satoshi Koyama, Tatsunori Hashida, Y. Umahashi, D. Masuda, Kimiyoshi Usami, Keiji Kimura, Mitaro Namiki, Seidai Takeda, Hiroshi Nakamura, Masaaki Kondo

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010

Adaptive power gating for function units in a microprocessor.

Kimiyoshi Usami, Tatsunori Hashida, Satoshi Koyama, Tatsuya Yamamoto, Daisuke Ikebuchi, Hideharu Amano, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura

Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

Reducing instruction TLB's leakage power consumption for embedded processors.

Zhao Lei, Hui Xu, Daisuke Ikebuchi, Hideharu Amano, Tetsuya Sunata, Mitaro Namiki

Proceedings of the International Green Computing Conference 2010, 2010

Proposal of a multi-core processor architecture for effective evolutionary computation.

Mikiko Sato, Yuji Sato, Mitaro Namiki

Proceedings of the Genetic and Evolutionary Computation Conference, 2010

Proposal of a multi-core processor from the viewpoint of evolutionary computation.

Mikiko Sato, Yuji Sato, Mitaro Namiki

Proceedings of the IEEE Congress on Evolutionary Computation, 2010

Geyser-1: a MIPS R3000 CPU core with fine-grained run-time power gating.

Daisuke Ikebuchi, Naomi Seki, Yu Kojima, M. Kamata, Lei Zhao, Hideharu Amano, Toshiaki Shirai, Satoshi Koyama, Tatsunori Hashida, Y. Umahashi, Hiroki Masuda, Kimiyoshi Usami, Seidai Takeda, Hiroshi Nakamura, Mitaro Namiki, Masaaki Kondo

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009

Design and Implementation of Fine-Grain Power Gating with Ground Bounce Suppression.

Kimiyoshi Usami, Toshiaki Shirai, Tatsunori Hashida, Hiroki Masuda, Seidai Takeda, Mitsutaka Nakata, Naomi Seki, Hideharu Amano, Mitaro Namiki, Masashi Imai, Masaaki Kondo, Hiroshi Nakamura

Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009

A CS unplugged design pattern.

Tomohiro Nishida, Susumu Kanemune, Yukio Idosaka, Mitaro Namiki, Tim Bell, Yasushi Kuno

Proceedings of the 40th SIGCSE Technical Symposium on Computer Science Education, 2009

Green Multicore-SoC Software-Execution Framework with Timely-Power-Gating Scheme.

Masafumi Onouchi, Keisuke Toyama, Tohru Nojiri, Makoto Sato, Masayoshi Mase, Jun Shirako, Mikiko Sato, Masashi Takada, Masayuki Ito, Hiroyuki Mizuno, Mitaro Namiki, Keiji Kimura, Hironori Kasahara

Proceedings of the ICPP 2009, 2009

2008

A fine-grain dynamic sleep control scheme in MIPS R3000.

Naomi Seki, Lei Zhao, Jo Kei, Daisuke Ikebuchi, Yu Kojima, Yohei Hasegawa, Hideharu Amano, Toshihiro Kashima, Seidai Takeda, Toshiaki Shirai, Mitsutaka Nakata, Kimiyoshi Usami, Tetsuya Sunata, Jun Kanai, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura

Proceedings of the 26th International Conference on Computer Design, 2008

2007

Mobile Thin-Client System with Fault Tolerance and Scalability by "HTTP-FUSE-KNOPPIX-BOX".

Jun Kanai, Mitaro Namiki, Kuniyasu Suzaki, Toshiki Yagi

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2007

2006

A Model of Implementable SMT Processor on FPGA.

Ippei Tate, Yoshiyasu Ogasawara, Mikiko Sato, Koichi Sasada, Kaname Uchikura, Kazunari Asano, Satoshi Watanabe, Mitaro Namiki, Hironori Nakajo

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications & Conference on Real-Time Computing Systems and Applications, 2006

Towards Reconfigurable Cache Memory for a Multithreaded Processor.

Yoshiyasu Ogasawara, Ippei Tate, Satoshi Watanabe, Mikiko Sato, Koichi Sasada, Kaname Uchikura, Kazunari Asano, Mitaro Namiki, Hironori Nakajo

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications & Conference on Real-Time Computing Systems and Applications, 2006

Implementation of PC Cluster System with Memory Mapped File by Commodity OS.

Jun Kanai, Takuro Mori, Takeshi Araki, Noboru Tanabe, Hironori Nakajo, Mitaro Namiki

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications & Conference on Real-Time Computing Systems and Applications, 2006

2005

Development of a Thread Scheduler for SMT Processor Architecture.

Kaname Uchikura, Koichi Sasada, Mikiko Sato, Masanori Yamato, Norito Kato, Hironori Nakajo, Mitaro Namiki

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2005

A New Model of Reconfigurable Cache for an SMT Processor and its FPGA Implementation.

Yoshiyasu Ogasawara, Norito Kato, Masanori Yamato, Mikiko Sato, Koichi Sasada, Kaname Uchikura, Mitaro Namiki, Hironori Nakajo

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2005

2004

Dynamic Allocation of Physical Register Banks for an SMT Processor.

Norito Kato, Masanori Yamato, Osamu Tujimoto, Mikiko Sato, Koichi Sasada, Kaname Uchikura, Mitaro Namiki, Hironori Nakajo

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2004

2003

A Process and Thread Management of the Operating System "Future" for On Chip Multithreaded Architecture.

Mikiko Sato, Koichi Sasada, Shoji Kawahara, Norito Kato, Masanori Yamato, Hironori Nakajo, Mitaro Namiki

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2003

Implementation and Evaluation of a Thread Library for Multithreaded Architecture.

Koichi Sasada, Mikiko Sato, Shoji Kawahara, Norito Kato, Masanori Yamato, Hironori Nakajo, Mitaro Namiki

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2003

Performance Evaluation of an On-Chip Multi-Threaded Processor with Cache Memory Managed by Logical Thread Number.

Hironori Nakajo, Masanori Yamato, Shoji Kawahara, Norito Kato, Koichi Sasada, Mikiko Sato, Mitaro Namiki

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2003

1991

Programming in a mother tongue: philosophy, implementation, practice and effect.

Toshio Souya, Eiichi Hayakawa, Masayuki Honma, Hidehiro Fukushima, Mitaro Namiki, Nobumasa Takahashi, Masaki Nakagawa

Proceedings of the Fifteenth Annual International Computer Software and Applications Conference, 1991