Miroslaw Pac

According to our database1, Miroslaw Pac authored at least 2 papers between 2005 and 2006.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2006
Handel-C Design Enhancement for FPGA-Based DV Decoder.
Proceedings of the Reconfigurable Computing: Architectures and Applications, 2006

2005
Real-time Handel-C Based Implementation of DV Decoder.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005


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