Miroslav Valka

According to our database1, Miroslav Valka authored at least 12 papers between 2011 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2016
Design for Test and Diagnosis of Power Switches.
J. Circuits Syst. Comput., 2016

Auto-adaptive ultra-low power IC.
Proceedings of the 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, 2016

2015
High frequency jitter estimator for SoCs.
Proceedings of the 20th IEEE European Test Symposium, 2015

Design-for-Diagnosis Architecture for Power Switches.
Proceedings of the 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2015

2014
iBoX - Jitter based Power Supply Noise sensor.
Proceedings of the 19th IEEE European Test Symposium, 2014

Test and diagnosis of power switches.
Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014

2013
Fast Power Evaluation for Effective Generation of Test Programs Maximizing Peak Power Consumption.
J. Low Power Electron., 2013

2012
Power Supply Noise Sensor Based on Timing Uncertainty Measurements.
Proceedings of the 21st IEEE Asian Test Symposium, 2012

Peak Power Estimation: A Case Study on CPU Cores.
Proceedings of the 21st IEEE Asian Test Symposium, 2012

2011
A Functional Power Evaluation Flow for Defining Test Power Limits during At-Speed Delay Testing.
Proceedings of the 16th European Test Symposium, 2011

Error Resilient Infrastructure for Data Transfer in a Distributed Neutron Detector.
Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011

Power consumption traces realignment to improve differential power analysis.
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011


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