Miron Abramovici

According to our database, Miron Abramovici authored at least 82 papers between 1977 and 2017.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2017

Keynote address tribute to Professor Mel Breuer: Contributions to CAD and Test.

Sandeep Gupta, Miron Abramovici, Magdy Abadir, Sridhar Narayanan

Proceedings of the 35th IEEE VLSI Test Symposium, 2017

2013

Protection Against Hardware Trojan Attacks: Towards a Comprehensive Solution.

Swarup Bhunia, Miron Abramovici, Dakshi Agrawal, Paul Bradley, Michael S. Hsiao, Jim Plusquellic, Mohammad Tehranipoor

IEEE Des. Test, 2013

2010

Bridging pre-silicon verification and post-silicon validation.

Amir Nahir, Avi Ziv, Rajesh Galivanche, Alan J. Hu, Miron Abramovici, Albert Camilleri, Bob Bentley, Harry Foster, Valeria Bertacco, Shakti Kapoor

Proceedings of the 47th Design Automation Conference, 2010

2009

We need more standards like IEEE 1500.

Miron Abramovici, Al Crouch

IEEE Des. Test Comput., 2009

Integrated circuit security: new threats and solutions.

Miron Abramovici, Paul Bradley

Proceedings of the Fifth Cyber Security and Information Intelligence Research Workshop, 2009

2008

In-System Silicon Validation and Debug.

Miron Abramovici

IEEE Des. Test Comput., 2008

In-system silicon validation using a reconfigurable platform.

Miron Abramovici

Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2008

You can catch more bugs with transaction level honey.

Miron Abramovici, Kees Goossens, Bart Vermeulen, Jack Greenbaum, Neal Stollon, Adam Donlin

Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, 2008

2007

Online Fault Tolerance for FPGA Logic Blocks.

John Marty Emmert, Charles E. Stroud, Miron Abramovici

IEEE Trans. Very Large Scale Integr. Syst., 2007

2006

A reconfigurable design-for-debug infrastructure for SoCs.

Miron Abramovici, Paul Bradley, Kumar N. Dwarakanath, Peter Levin, Gérard Memmi, Dave Miller

Proceedings of the 43rd Design Automation Conference, 2006

2005

Sequential circuit ATPG using combinational algorithms.

Xiaoming Yu, Miron Abramovici

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

2004

Online BIST and BIST-based diagnosis of FPGA logic blocks.

Miron Abramovici, Charles E. Stroud, John Marty Emmert

IEEE Trans. Very Large Scale Integr. Syst., 2004

2003

BIST-Based Delay-Fault Testing in FPGAs.

Miron Abramovici, Charles E. Stroud

J. Electron. Test., 2003

2002

BIST-Based Diagnosis of FPGA Interconnect.

Charles E. Stroud, Jeremy Nall, Matthew Lashinsky, Miron Abramovici

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

Low-cost sequential ATPG with clock-control DFT.

Miron Abramovici, Xiaoming Yu, Elizabeth M. Rudnick

Proceedings of the 39th Design Automation Conference, 2002

Using embedded FPGAs for SoC yield improvement.

Miron Abramovici, Charles E. Stroud, John Marty Emmert

Proceedings of the 39th Design Automation Conference, 2002

2001

BIST-based test and diagnosis of FPGA logic blocks.

Miron Abramovici, Charles E. Stroud

IEEE Trans. Very Large Scale Integr. Syst., 2001

Sequential ATPG Using Combinational Algorithms.

Miron Abramovici, Xiaoming Yu, Elizabeth M. Rudnick

Proceedings of the 2nd Latin American Test Workshop, 2001

Design for Testability Techniques: A Comparative Analysis.

Miron Abramovici

Proceedings of the 2nd Latin American Test Workshop, 2001

At-speed logic BIST using a frozen clock testing strategy.

Jongshin Shin, Xiaoming Yu, Elizabeth M. Rudnick, Miron Abramovici

Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

On-Line BIST and Diagnosis of FPGA Interconnect Using Roving STARs.

Miron Abramovici, Charles E. Stroud, Matthew Lashinsky, Jeremy Nall, John Marty Emmert

Proceedings of the 7th IEEE International On-Line Testing Workshop (IOLTW 2001), 2001

A Configurable Hardware/Software Approach to SAT Solving.

José T. de Sousa, J. M. da Silva, Miron Abramovici

Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

Roving Stars: An Integrated Approach To On-Line Testing, Diagnosis, And Fault Tolerance For Fpgas In Adaptive Computing Systems.

Miron Abramovici, John Marty Emmert, Charles E. Stroud

Proceedings of the 3rd NASA / DoD Workshop on Evolvable Hardware (EH 2001), 2001

On-Line Fault Tolerance for FPGA Interconnect with Roving STARs.

John Marty Emmert, Stanley Baumgart, Pankaj Kataria, Andrew M. Taylor, Charles E. Stroud, Miron Abramovici

Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001

2000

FILL and FUNI: algorithms to identify illegal states and sequentially untestable faults.

David E. Long, Mahesh A. Iyer, Miron Abramovici

ACM Trans. Design Autom. Electr. Syst., 2000

Compact Test Generation Using a Frozen Clock Testing Strategy.

Elizabeth M. Rudnick, Miron Abramovici

J. Inf. Sci. Eng., 2000

A SAT Solver Using Reconfigurable Hardware and Virtual Logic.

Miron Abramovici, José T. de Sousa

J. Autom. Reason., 2000

MUST: multiple-stem analysis for identifying sequentially untestable faults.

Qiang Peng, Miron Abramovici, Jacob Savir

Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

DIST-based detection and diagnosis of multiple faults in FPGAs.

Miron Abramovici, Charles E. Stroud

Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

Improving On-Line BIST-Based Diagnosis for Roving STARs.

Miron Abramovici, Charles E. Stroud, Brandon Skaggs, John Marty Emmert

Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW 2000), 2000

Performance Penalty for Fault Tolerance in Roving STARs.

John Marty Emmert, Charles E. Stroud, Jason A. Cheatham, Andrew M. Taylor, Pankaj Kataria, Miron Abramovici

Proceedings of the Field-Programmable Logic and Applications, 2000

Dynamic Fault Tolerance in FPGAs via Partial Reconfiguration.

John Marty Emmert, Charles E. Stroud, Brandon Skaggs, Miron Abramovici

Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

1999

Using roving STARs for on-line testing and diagnosis of FPGAs in fault-tolerant applications.

Miron Abramovici, Charles E. Stroud, Carter Hamilton, Sajitha Wijesuriya, Vinay Verma

Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

A Virtual Logic Algorithm for Solving Satisfiability Problems Using Reconfigurable Hardware.

Miron Abramovici, José T. de Sousa

Proceedings of the 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 1999

FreezeFrame: Compact Test Generation Using a Frozen Clock Strategy.

Yanti Santoso, Matthew C. Merten, Elizabeth M. Rudnick, Miron Abramovici

Proceedings of the 1999 Design, 1999

A Massively-Parallel Easily-Scalable Satisfiability Solver Using Reconfigurable Hardware.

Miron Abramovici, José T. de Sousa, Daniel G. Saab

Proceedings of the 36th Conference on Design Automation, 1999

1998

Built-in self-test of FPGA interconnect.

Charles E. Stroud, Sajitha Wijesuriya, Carter Hamilton, Miron Abramovici

Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

1997

BIST-Based Diagnostics of FPGA Logic Blocks.

Charles E. Stroud, Eric Lee, Miron Abramovici

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

Satisfiability on reconfigurable hardware.

Miron Abramovici, Daniel G. Saab

Proceedings of the Field-Programmable Logic and Applications, 7th International Workshop, 1997

Fault simulation on reconfigurable hardware.

Miron Abramovici, Prem R. Menon

Proceedings of the 5th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '97), 1997

1996

FIRE: a fault-independent combinational redundancy identification algorithm.

Mahesh A. Iyer, Miron Abramovici

IEEE Trans. Very Large Scale Integr. Syst., 1996

Built-in self-test of logic blocks in FPGAs (Finally, a free lunch: BIST without overhead!).

Charles E. Stroud, Srinivasa Konala, Ping Chen, Miron Abramovici

Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

Increasing testability by clock transformation (getting rid of those darn states).

Krishna B. Rajan, David E. Long, Miron Abramovici

Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

Using ILA Testing for BIST in FPGAs.

Charles E. Stroud, Eric Lee, Srinivasa Konala, Miron Abramovici

Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

Evaluation of FPGA Resources for Built-In Self-Test of Programmable Logic Blocks.

Charles E. Stroud, Ping Chen, Srinivasa Konala, Miron Abramovici

Proceedings of the 1996 Fourth International Symposium on Field Programmable Gate Arrays, 1996

Surprises in Sequential Redundancy Identification.

Mahesh A. Iyer, David E. Long, Miron Abramovici

Proceedings of the 1996 European Design and Test Conference, 1996

Identifying Sequential Redundancies Without Search.

Mahesh A. Iyer, David E. Long, Miron Abramovici

Proceedings of the 33st Conference on Design Automation, 1996

1995

Testability-based partial scan analysis.

Prashant S. Parikh, Miron Abramovici

J. Electron. Test., 1995

Identifying sequentially untestable faults using illegal states.

David E. Long, Mahesh A. Iyer, Miron Abramovici

Proceedings of the 13th IEEE VLSI Test Symposium (VTS'95), April 30, 1995

On Combining Design for Testability Techniques.

Prashant S. Parikh, Miron Abramovici

Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

1994

Low-Cost Redundancy Identification for Combinatorial Circuits.

Mahesh A. Iyer, Miron Abramovici

Proceedings of the Seventh International Conference on VLSI Design, 1994

Sequentially Untestable Faults Identified Without Search ("Simple Implications Beat Exhaustive Search!").

Mahesh A. Iyer, Miron Abramovici

Proceedings of the Proceedings IEEE International Test Conference 1994, 1994

1993

On Selecting Flip-Flops for Partial Reset.

Miron Abramovici, Prashant S. Parikh, Ben Mathew, Daniel G. Saab

Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

DOs and DON'Ts in Computing Fault Coverage.

Miron Abramovici

Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

A Cost-Based Approach to Partial Scan.

Prashant S. Parikh, Miron Abramovici

Proceedings of the 30th Design Automation Conference. Dallas, 1993

1992

Dynamic redundancy identification in automatic test generation.

Miron Abramovici, David T. Miller, Rabindra K. Roy

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992

Warning: 100% Fault Coverage May Be Misleading!!

Miron Abramovici, Prashant S. Parikh

Proceedings of the Proceedings IEEE International Test Conference 1992, 1992

One-Pass Redundancy Identification and Removal.

Miron Abramovici, Mahesh A. Iyer

Proceedings of the Proceedings IEEE International Test Conference 1992, 1992

Freeze!: A New Approach for Testing Sequential Circuits.

Miron Abramovici, Krishna B. Rajan, David T. Miller

Proceedings of the 29th Design Automation Conference, 1992

1991

SCRIPT: a critical path tracing algorithm for synchronous sequential circuits.

Premachandran R. Menon, Ytzhak H. Levendel, Miron Abramovici

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991

The Best Flip-Flops to Scan.

Miron Abramovici, James J. Kulikowski, Rabindra K. Roy

Proceedings of the Proceedings IEEE International Test Conference 1991, 1991

1990

Global cost functions for test generation.

Miron Abramovici, David T. Miller, R. Henning

Proceedings of the Proceedings IEEE International Test Conference 1990, 1990

Digital systems testing and testable design.

Miron Abramovici, Melvin A. Breuer, Arthur D. Friedman

Computer Science Press, ISBN: 978-0-7167-8179-0, 1990

1989

System-level design verification in the AT&T Computer Division: tools.

Miron Abramovici, James J. Kulikowski, David T. Miller, Prem R. Menon

Proceedings of the Computer Design: VLSI in Computers and Processors, 1989

System-level design verification in the AT&T computer division: overview and strategy.

Miron Abramovici, J. W. Bierbauer, R. H. Hellman, C. L. Hong, David T. Miller, R. G. Taylor

Proceedings of the Computer Design: VLSI in Computers and Processors, 1989

1988

What is the Path to Fast Fault Simulation?

Miron Abramovici, Balaji Krishnamurthy, Rob Mathews, Bill Rogers, Michael Schulz, Sharad Seth, John A. Waicukauski

Proceedings of the Proceedings International Test Conference 1988, 1988

Critical path tracing in sequential circuits.

Prem R. Menon, Ytzhak H. Levendel, Miron Abramovici

Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

1986

Checkpoint Faults are not Sufficient Target Faults for Test Generation.

Miron Abramovici, Prem R. Menon, David T. Miller

IEEE Trans. Computers, 1986

SMART and FAST: Test Generation for VLSI Scan-Design Circuits.

Miron Abramovici, James J. Kulikowski, Premachandran R. Menon, David T. Miller

IEEE Des. Test, 1986

1985

A Practical Approach to Fault Simulation and Test Generation for Bridging Faults.

Miron Abramovici, Prem R. Menon

IEEE Trans. Computers, 1985

Test Generation In Lamp2: Concepts and Algorithms.

Miron Abramovici, James J. Kulikowski, Premachandran R. Menon, David T. Miller

Proceedings of the Proceedings International Test Conference 1985, 1985

Test Generation In Lamp2: System Overview.

Miron Abramovici, James J. Kulikowski, Premachandran R. Menon, David T. Miller

Proceedings of the Proceedings International Test Conference 1985, 1985

Low-Cost Fault Simulation: Why, When and How.

Miron Abramovici

Proceedings of the Proceedings International Test Conference 1985, 1985

1984

Critical Path Tracing: An Alternative to Fault Simulation.

Miron Abramovici, Prem R. Menon, David T. Miller

IEEE Des. Test, 1984

1983

A Logic Simulation Machine.

Miron Abramovici, Ytzhak H. Levendel, Premachandran R. Menon

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1983

1982

Fault Diagnosis in Synchronous Sequential Circuits Based on an Effect-Cause Analysis.

Miron Abramovici, Melvin A. Breuer

IEEE Trans. Computers, 1982

A Hierarchical, Path-Oriented Approach to Fault Diagnosis in Modular Combinational Circuits.

Miron Abramovici

IEEE Trans. Computers, 1982

1981

A maximal resolution guided-probe testing algorithm.

Miron Abramovici

Proceedings of the 18th Design Automation Conference, 1981

1980

Multiple Fault Diagnosis in Combinational Circuits Based on an Effect-Cause Analysis.

Miron Abramovici, Melvin A. Breuer

IEEE Trans. Computers, 1980

Fault diagnosis based on effect-cause analysis: An introduction.

Miron Abramovici, Melvin A. Breuer

Proceedings of the 17th Design Automation Conference, 1980

1979

On Redundancy and Fault Detection in Sequential Circuits.

Miron Abramovici, Melvin A. Breuer

IEEE Trans. Computers, 1979

1977

Concurrent fault simulation and functional level modeling.

Miron Abramovici, Melvin A. Breuer, K. Kumar

Proceedings of the 14th Design Automation Conference, 1977