Mircea R. Stan
Orcid: 0000-0003-0577-9976Affiliations:
- University of Virginia, Charlottesville, USA
According to our database1,
Mircea R. Stan
authored at least 210 papers
between 1994 and 2024.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2014, "For contributions to power- and temperature-aware design of VLSI circuits and systems".
Timeline
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Online presence:
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on orcid.org
On csauthors.net:
Bibliography
2024
Hot-LEGO: Architect Microfluidic Cooling Equipped 3DICs with Pre-RTL Thermal Simulation.
CoRR, 2024
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024
EASI-CiM: Event-driven Asynchronous Stream-based Image classifier with Compute-in-Memory kernels.
Proceedings of the 25th International Symposium on Quality Electronic Design, 2024
A Feedback Self-adaptive Body Biasing-based RF-DC Rectifier for Highly-sensitive RF Energy Harvesting.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
Proceedings of the Device Research Conference, 2024
2023
IEEE Trans. Very Large Scale Integr. Syst., December, 2023
IEEE Trans. Very Large Scale Integr. Syst., December, 2023
IEEE Trans. Very Large Scale Integr. Syst., August, 2023
Proceedings of the 14th IEEE Annual Ubiquitous Computing, 2023
LiteAIR5: A System-Level Framework for the Design and Modeling of AI-extended RISC-V Cores.
Proceedings of the 36th IEEE International System-on-Chip Conference, 2023
Proceedings of the IEEE International Conference on RFID, 2023
Proceedings of the 24th ACM SIGPLAN/SIGBED International Conference on Languages, 2023
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023
Hot-LEGO: Architect Microfluidic Cooling Equipped 3DIC with Pre-RTL Thermal Simulation.
Proceedings of the 14th International Green and Sustainable Computing Conference, 2023
Design Space Exploration of Layer-Wise Mixed-Precision Quantization with Tightly Integrated Edge Inference Units.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
IEEE Trans. Very Large Scale Integr. Syst., 2022
EXTREM-EDGE - EXtensions To RISC-V for Energy-efficient ML inference at the EDGE of IoT.
Sustain. Comput. Informatics Syst., 2022
Integr., 2022
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022
Proceedings of the LCTES '22: 23rd ACM SIGPLAN/SIGBED International Conference on Languages, 2022
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022
Towards Everlasting Flash: Preventing Permanent Flash Cell Damage using Circadian Rhythms.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022
Gearbox: a case for supporting accumulation dispatching and hybrid partitioning in PIM-based accelerators.
Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
2021
Proceedings of the 7th IEEE World Forum on Internet of Things, 2021
Proceedings of the 4th International Symposium on Devices, Circuits and Systems, 2021
Proceedings of the 28th IEEE International Conference on Electronics, 2021
2020
Low-Power, Highly Reliable Dynamic Thermal Management by Exploiting Approximate Computing.
IEEE Trans. Very Large Scale Integr. Syst., 2020
Towards on-node Machine Learning for Ultra-low-power Sensors Using Asynchronous Σ Δ Streams.
ACM J. Emerg. Technol. Comput. Syst., 2020
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020
Impala: Algorithm/Architecture Co-Design for In-Memory Multi-Stride Pattern Matching.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020
Fulcrum: A Simplified Control and Access Mechanism Toward Flexible and Practical In-Situ Accelerators.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020
Grapefruit: An Open-Source, Full-Stack, and Customizable Automata Processing on FPGAs.
Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
FlexAmata: A Universal and Efficient Adaption of Applications to Spatial Automata Processing Accelerators.
Proceedings of the ASPLOS '20: Architectural Support for Programming Languages and Operating Systems, 2020
2019
IEEE Trans. Very Large Scale Integr. Syst., 2019
IEEE Trans. Very Large Scale Integr. Syst., 2019
Automata Processing in Reconfigurable Architectures: In-the-Cloud Deployment, Cross-Platform Evaluation, and Fast Symbol-Only Reconfiguration.
ACM Trans. Reconfigurable Technol. Syst., 2019
A Scalable and Efficient In-Memory Interconnect Architecture for Automata Processing.
IEEE Comput. Archit. Lett., 2019
Error-latency Trade-off for Asynchronous Stochastic Computing with ΣΔ Streams for the IoT.
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019
ASC-FFT: Area-Efficient Low-Latency FFT Design Based on Asynchronous Stochastic Computing.
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019
Proceedings of the IEEE International Symposium on Workload Characterization, 2019
Proceedings of the Tenth International Green and Sustainable Computing Conference, 2019
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Proceedings of the 53rd Asilomar Conference on Signals, Systems, and Computers, 2019
Proceedings of the 53rd Asilomar Conference on Signals, Systems, and Computers, 2019
2018
IEEE Trans. Very Large Scale Integr. Syst., 2018
Tolerating Soft Errors in Processor Cores Using CLEAR (Cross-Layer Exploration for Architecting Resilience).
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Hardware based Spatio-Temporal Neural Processing Backend for Imaging Sensors: Towards a Smart Camera.
CoRR, 2018
MNCaRT: An Open-Source, Multi-Architecture Automata-Processing Research and Execution Ecosystem.
IEEE Comput. Archit. Lett., 2018
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018
Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures, 2018
A post-silicon hold time closure technique using data-path tunable-buffers for variation-tolerance in sub-threshold designs.
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018
Proceedings of the 2018 IEEE International Symposium on Workload Characterization, 2018
Proceedings of the 2018 IEEE International Conference on Rebooting Computing, 2018
Proceedings of the 36th IEEE International Conference on Computer Design, 2018
Proceedings of the 55th Annual Design Automation Conference, 2018
SRAM based opportunistic energy efficiency improvement in dual-supply near-threshold processors.
Proceedings of the 55th Annual Design Automation Conference, 2018
2017
Dual-Data Rate Transpose-Memory Architecture Improves the Performance, Power and Area of Signal-Processing Systems.
J. Signal Process. Syst., 2017
J. Low Power Electron., 2017
Implications of accelerated self-healing as a key design knob for cross-layer resilience.
Integr., 2017
Panel discussion: Autonomy, technology, safety - Where will automotive electronics go in the next decade?
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017
Pre-RTL Voltage and Power Optimization for Low-Cost, Thermally Challenged Multicore Chips.
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017
Proceedings of the 47th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, 2017
PPE-ARX: Area- and power-efficient VLIW programmable processing element for IoT crypto-systems.
Proceedings of the 2017 NASA/ESA Conference on Adaptive Hardware and Systems, 2017
2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
Gate Overdrive with Split-Circuit Biasing to Substitute for Body Biasing in FinFET and UTB FDSOI Circuits.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016
ANMLzoo: a benchmark suite for exploring bottlenecks in automata processing engines and architectures.
Proceedings of the 2016 IEEE International Symposium on Workload Characterization, 2016
Proceedings of the 34th IEEE International Conference on Computer Design, 2016
Clear: cross-layer exploration for architecting resilience combining hardware and software techniques to tolerate soft errors in processor cores.
Proceedings of the 53rd Annual Design Automation Conference, 2016
Proceedings of the Eleventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2016
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016
2015
SymmTop: A Symmetric Circuit Topology for Ultra Low Power Wide Temperature-Range Applications.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
A digitally-controlled power-aware low-dropout regulator to reduce standby current drain in ultra-low-power MCU.
Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015
Transient voltage noise in charge-recycled power delivery networks for many-layer 3D-IC.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium, 2015
A cross-layer design exploration of charge-recycled power-delivery in many-layer 3d-IC.
Proceedings of the 52nd Annual Design Automation Conference, 2015
2014
Spin torque nano oscillators as key building blocks for the Systems-on-Chip of the future.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2014
A multi-output on-chip switched-capacitor DC-DC converter for near- and sub-threshold power modes.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
2013
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
Nano-pattemed coupled spin torque nano oscillator (STNO) arrays - A potentially disruptive multipurpose nanotechnology.
Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2013
2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012
Proceedings of the IEEE 25th International SOC Conference, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the Great Lakes Symposium on VLSI 2012, 2012
Proceedings of the Conference Record of the Forty Sixth Asilomar Conference on Signals, 2012
2011
Sustain. Comput. Informatics Syst., 2011
IEEE Micro, 2011
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011
Delivering on the promise of universal memory for spin-transfer torque RAM (STT-RAM).
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011
Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011
Experimental demonstration of standby power reduction using voltage stacking in an 8Kb embedded FDSOI SRAM.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011
2010
Proc. IEEE, 2010
Proceedings of the 28th International Conference on Computer Design, 2010
Proceedings of the 2nd USENIX Workshop on Hot Topics in Storage and File Systems, 2010
Proceedings of the International Green Computing Conference 2010, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
Proceedings of the 47th Design Automation Conference, 2010
Proceedings of the 47th Design Automation Conference, 2010
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010
2009
IEEE Micro, 2009
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
Differentiating the roles of IR measurement and simulation for power and temperature-aware design.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
2008
Accurate, Pre-RTL Temperature-Aware Design Using a Parameterized, Geometric Thermal Model.
IEEE Trans. Computers, 2008
Sensitivity Based Power Management of Enterprise Storage Systems.
Proceedings of the 16th International Symposium on Modeling, 2008
Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008), 2008
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008
Proceedings of the 45th Design Automation Conference, 2008
2007
IEEE Trans. Very Large Scale Integr. Syst., 2007
IEEE Trans. Circuits Syst. I Regul. Pap., 2007
IEEE Trans. Circuits Syst. I Regul. Pap., 2007
ACM J. Emerg. Technol. Comput. Syst., 2007
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007
Proceedings of the 44th Design Automation Conference, 2007
2006
IEEE Trans. Very Large Scale Integr. Syst., 2006
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006
A Design Methodology for a Low-Power, Temperature-Aware SoC Developed for Medical Image Processors.
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006
Design approaches for hybrid CMOS/molecular memory based on experimental device data.
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
2005
J. Instr. Level Parallelism, 2005
The need for a full-chip and package thermal model for thermally optimized IC designs.
Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005
Proceedings of the 42nd Design Automation Conference, 2005
2004
IEEE Trans. Very Large Scale Integr. Syst., 2004
IEEE Trans. Computers, 2004
ACM Trans. Archit. Code Optim., 2004
Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004
Proceedings of the Integrated Circuit and System Design, 2004
Systolic counters with unique zero state.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004
Proceedings of the 2004 Design, 2004
Proceedings of the 2004 Design, 2004
Proceedings of the 41th Design Automation Conference, 2004
System level leakage reduction considering the interdependence of temperature and leakage.
Proceedings of the 41th Design Automation Conference, 2004
2003
Proc. IEEE, 2003
Microelectron. J., 2003
Alloyed Branch History: Combining Global and Local Branch History for Robust Performance.
Int. J. Parallel Program., 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 30th International Symposium on Computer Architecture (ISCA 2003), 2003
Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003
2002
Analysis of dual-V<sub>T</sub> SRAM cells with full-swing single-ended bit line sensing for on-chip cache.
IEEE Trans. Very Large Scale Integr. Syst., 2002
IEEE J. Solid State Circuits, 2002
Proceedings of the 2002 workshop on Computer architecture education, 2002
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002
Control-Theoretic Techniques and Thermal-RC Modeling for Accurate and Localized Dynamic Thermal Management.
Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), 2002
Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), 2002
Proceedings of the 2002 Design, 2002
Proceedings of the International Conference on Compilers, 2002
2001
IEEE Trans. Very Large Scale Integr. Syst., 2001
Optimal logarithmic adder structures with a fanout of two for minimizing the area-delay product.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
Active threshold compensation circuit for improved performance in cooled CMOS systems.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
2000
Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000
1999
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999
Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999
1998
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998
1997
IEEE Trans. Very Large Scale Integr. Syst., 1997
Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997
Proceedings of the 13th Symposium on Computer Arithmetic (ARITH-13 '97), 1997
1996
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996
1995
IEEE Trans. Very Large Scale Integr. Syst., 1995
Proceedings of the 5th Great Lakes Symposium on VLSI (GLS-VLSI '95), 1995
1994