Miquel Pericàs

According to our database, Miquel Pericàs authored at least 77 papers between 2003 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

SWEEP: Adaptive Task Scheduling for Exploring Energy Performance Trade-offs.

Jing Chen, Madhavan Manivannan, Bhavishya Goel, Miquel Pericàs

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2024

Co-Design of Convolutional Algorithms and Long Vector RISC-V Processors for Efficient CNN Model Serving.

Sonia Rani Gupta, Nikela Papadopoulou, Jing Chen, Miquel Pericàs

Proceedings of the 53rd International Conference on Parallel Processing, 2024

2023

At the Locus of Performance: Quantifying the Effects of Copious 3D-Stacked Cache on HPC Workloads.

Jens Domke, Emil Vatai, Balazs Gerofi, Yuetsu Kodama, Mohamed Wahib, Artur Podobas, Sparsh Mittal, Miquel Pericàs, Lingqi Zhang, Peng Chen, Aleksandr Drozd, Satoshi Matsuoka

ACM Trans. Archit. Code Optim., December, 2023

Challenges and Opportunities in the Co-design of Convolutions and RISC-V Vector Processors.

Sonia Rani Gupta, Nikela Papadopoulou, Miquel Pericàs

Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023

Analysis and Characterization of Performance Variability for OpenMP Runtime.

Minyu Cui, Nikela Papadopoulou, Miquel Pericàs

Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023

Accelerating CNN inference on long vector architectures via co-design.

Sonia Rani Gupta, Nikela Papadopoulou, Miquel Pericàs

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

JOSS: Joint Exploration of CPU-Memory DVFS and Task Scheduling for Energy Efficiency.

Jing Chen, Madhavan Manivannan, Bhavishya Goel, Miquel Pericàs

Proceedings of the 52nd International Conference on Parallel Processing, 2023

ODIN: Overcoming Dynamic Interference in iNference Pipelines.

Pirah Noor Soomro, Nikela Papadopoulou, Miquel Pericàs

Proceedings of the Euro-Par 2023: Parallel Processing - 29th International Conference on Parallel and Distributed Computing, Limassol, Cyprus, August 28, 2023

2022

Cooperative Slack Management: Saving Energy of Multicore Processors by Trading Performance Slack Between QoS-Constrained Applications.

Mehrzad Nejat, Madhavan Manivannan, Miquel Pericàs, Per Stenström

ACM Trans. Archit. Code Optim., 2022

ERASE: Energy Efficient Task Mapping and Resource Management for Work Stealing Runtimes.

Jing Chen, Madhavan Manivannan, Mustafa Abduljabbar, Miquel Pericàs

ACM Trans. Archit. Code Optim., 2022

Task-RM: A Resource Manager for Energy Reduction in Task-Parallel Applications under Quality of Service Constraints.

Muhammad Waqar Azhar, Miquel Pericàs, Per Stenström

ACM Trans. Archit. Code Optim., 2022

Energy-Efficiency Evaluation of OpenMP Loop Transformations and Runtime Constructs.

Henrik Valter, Axel Karlsson, Miquel Pericàs

CoRR, 2022

At the Locus of Performance: A Case Study in Enhancing CPUs with Copious 3D-Stacked Cache.

Jens Domke, Emil Vatai, Balazs Gerofi, Yuetsu Kodama, Mohamed Wahib, Artur Podobas, Sparsh Mittal, Miquel Pericàs, Lingqi Zhang, Peng Chen, Aleksandr Drozd, Satoshi Matsuoka

CoRR, 2022

STEER: Asymmetry-aware Energy Efficient Task Scheduler for Cluster-based Multicore Architectures.

Jing Chen, Madhavan Manivannan, Bhavishya Goel, Mustafa Abduljabbar, Miquel Pericàs

Proceedings of the 2022 IEEE 34th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 2022

Shisha: Online Scheduling of CNN Pipelines on Heterogeneous Architectures.

Pirah Noor Soomro, Mustafa Abduljabbar, Jerónimo Castrillón, Miquel Pericàs

Proceedings of the Parallel Processing and Applied Mathematics, 2022

2021

Mitigating inefficient task mappings with an Adaptive Resource-Moldable Scheduler (ARMS).

Mustafa Abduljabbar, Mahmoud Eljammaly, Miquel Pericàs

CoRR, 2021

Vectorized Barrier and Reduction in LLVM OpenMP Runtime.

Muhammed Nufail Farooqi, Miquel Pericàs

Proceedings of the OpenMP: Enabling Massive Node-Level Parallelism, 2021

An online guided tuning approach to run CNN pipelines on edge devices.

Pirah Noor Soomro, Mustafa Abduljabbar, Jerónimo Castrillón, Miquel Pericàs

Proceedings of the CF '21: Computing Frontiers Conference, 2021

CBP: Coordinated management of cache partitioning, bandwidth partitioning and prefetch throttling.

Nadja Ramhöj Holtryd, Madhavan Manivannan, Per Stenström, Miquel Pericàs

Proceedings of the 30th International Conference on Parallel Architectures and Compilation Techniques, 2021

2020

Coordinated management of DVFS and cache partitioning under QoS constraints to save energy in multi-core systems.

Mehrzad Nejat, Madhavan Manivannan, Miquel Pericàs, Per Stenström

J. Parallel Distributed Comput., 2020

Proceedings of the Thirteenth International Workshop on Programmability and Architectures for Heterogeneous Multicores (MULTIPROG-2020).

Miquel Pericàs, Oscar Palomar, Vassilis Papaefstathiou, Mahmoud Eljammaly

CoRR, 2020

Coordinated Management of Processor Configuration and Cache Partitioning to Optimize Energy under QoS Constraints.

Mehrzad Nejat, Madhavan Manivannan, Miquel Pericàs, Per Stenström

Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2020

DELTA: Distributed Locality-Aware Cache Partitioning for Tile-based Chip Multiprocessors.

Nadja Holtryd, Madhavan Manivannan, Per Stenström, Miquel Pericàs

Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2020

Scheduling Task-parallel Applications in Dynamically Asymmetric Environments.

Jing Chen, Pirah Noor Soomro, Mustafa Abduljabbar, Madhavan Manivannan, Miquel Pericàs

Proceedings of the ICPP Workshops '20: Workshops, Edmonton, AB, Canada, August 17-20, 2020, 2020

Enhancing Multithreaded Performance of Asymmetric Multicores with SIMD Offloading.

Jeckson Dellagostin Souza, Madhavan Manivannan, Miquel Pericàs, Antonio Carlos Schneider Beck

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

LEGaTO: Low-Energy, Secure, and Resilient Toolset for Heterogeneous Computing.

Behzad Salami, Konstantinos Parasyris, Adrián Cristal, Osman S. Unsal, Xavier Martorell, Paul Carpenter, Raúl de la Cruz, Leonardo Bautista-Gomez, Daniel A. Jiménez, Carlos Álvarez, Seyed Saber Nabavi Larimi, Sergi Madonar, Miquel Pericàs, Pedro Trancoso, Mustafa Abduljabbar, Jing Chen, Pirah Noor Soomro, Madhavan Manivannan, Micha vor dem Berge, Stefan Krupop, Frank Klawonn, Al Mekhlafi, Sigrun May, Tobias Becker, Georgi Gaydadjiev, Hans Salomonsson, Devdatt P. Dubhashi, Oron Port, Yoav Etsion, Do Le Quoc, Christof Fetzer, Martin Kaiser, Nils Kucza, Jens Hagemeyer, René Griessl, Lennart Tigges, Kevin Mika, A. Hüffmeier, Marcelo Pasin, Valerio Schiavoni, Isabelly Rocha, Christian Göttel, Pascal Felber

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

Enhancing Thread-Level Parallelism in Asymmetric Multicores using Transparent Instruction Offloading.

Jeckson Dellagostin Souza, Madhavan Manivannan, Miquel Pericàs, Antonio Carlos Schneider Beck

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019

LEGaTO: Low-Energy, Secure, and Resilient Toolset for Heterogeneous Computing.

Behzad Salami, Konstantinos Parasyris, Adrián Cristal, Osman S. Unsal, Xavier Martorell, Paul Carpenter, Raúl de la Cruz, Leonardo Bautista-Gomez, Daniel A. Jiménez, Carlos Álvarez, S. Nabavi, Sergi Madonar, Miquel Pericàs, Pedro Trancoso, Mustafa Abduljabbar, Jing Chen, Pirah Noor Soomro, Madhavan Manivannan, Micha vor dem Berge, Stefan Krupop, Frank Klawonn, Al Mekhlafi, Sigrun May, Tobias Becker, Georgi Gaydadjiev, Daniel Ödman, Hans Salomonsson, Devdatt P. Dubhashi, Oron Port, Yoav Etsion, Do Le Quoc, Christof Fetzer, Martin Kaiser, Nils Kucza, Jens Hagemeyer, René Griessl, Lennart Tigges, Kevin Mika, A. Hüffmeier, Th. Jungeblu, Marcelo Pasin, Valerio Schiavoni, Isabelly Rocha, Christian Göttel, Pascal Felber

CoRR, 2019

An Adaptive Performance-oriented Scheduler for Static and Dynamic Heterogeneity.

Jing Chen, Pirah Noor Soomro, Mustafa Abdul Jabbar, Miquel Pericàs

CoRR, 2019

High performance scheduling of mixed-mode DAGs on heterogeneous multicores.

Agnes Rohlin, Henrik Fahlgren, Miquel Pericàs

CoRR, 2019

QoS-Driven Coordinated Management of Resources to Save Energy in Multi-core Systems.

Mehrzad Nejat, Miquel Pericàs, Per Stenström

Proceedings of the 2019 IEEE International Parallel and Distributed Processing Symposium, 2019

SaC: Exploiting Execution-Time Slack to Save Energy in Heterogeneous Multicore Systems.

Muhammad Waqar Azhar, Miquel Pericàs, Per Stenström

Proceedings of the 48th International Conference on Parallel Processing, 2019

2018

Elastic Places: An Adaptive Resource Manager for Scalable and Portable Performance.

Miquel Pericàs

ACM Trans. Archit. Code Optim., 2018

Global Dead-Block Management for Task-Parallel Programs.

Madhavan Manivannan, Miquel Pericàs, Vassilis Papaefstathiou, Per Stenström

ACM Trans. Archit. Code Optim., 2018

LEGaTO: first steps towards energy-efficient toolset for heterogeneous computing.

Adrián Cristal, Osman S. Unsal, Xavier Martorell, Paul Carpenter, Raúl de la Cruz, Leonardo Bautista-Gomez, Daniel Jiménez-González, Carlos Álvarez, Behzad Salami, Sergi Madonar, Miquel Pericàs, Pedro Trancoso, Micha vor dem Berge, Gunnar Billung-Meyer, Stefan Krupop, Wolfgang Christmann, Frank Klawonn, Amani Mihklafi, Tobias Becker, Georgi Gaydadjiev, Hans Salomonsson, Devdatt P. Dubhashi, Oron Port, Elad Hadar, Yoav Etsion, Christof Fetzer, Jens Hagemeyer, Thorsten Jungeblut, Nils Kucza, Martin Kaiser, Mario Porrmann, Marcelo Pasin, Valerio Schiavoni, Isabelly Rocha, Christian Göttel, Pascal Felber

Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

LEGaTO: towards energy-efficient, secure, fault-tolerant toolset for heterogeneous computing.

Adrián Cristal, Osman S. Unsal, Xavier Martorell, Paul Carpenter, Raúl de la Cruz, Leonardo Bautista-Gomez, Daniel Jiménez-González, Carlos Álvarez, Behzad Salami, Sergi Madonar, Miquel Pericàs, Pedro Trancoso, Micha vor dem Berge, Gunnar Billung-Meyer, Stefan Krupop, Wolfgang Christmann, Frank Klawonn, Amani Mihklafi, Tobias Becker, Georgi Gaydadjiev, Hans Salomonsson, Devdatt P. Dubhashi, Oron Port, Yoav Etsion, Vesna Nowack, Christof Fetzer, Jens Hagemeyer, Thorsten Jungeblut, Nils Kucza, Martin Kaiser, Mario Porrmann, Marcelo Pasin, Valerio Schiavoni, Isabelly Rocha, Christian Göttel, Pascal Felber

Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018

2017

Trends in Data Locality Abstractions for HPC Systems.

Didem Unat, Anshu Dubey, Torsten Hoefler, John Shalf, Mark James Abraham, Mauro Bianco, Bradford L. Chamberlain, Romain Cledat, H. Carter Edwards, Hal Finkel, Karl Fuerlinger, Frank Hannig, Emmanuel Jeannot, Amir Kamil, Jeff Keasler, Paul H. J. Kelly, Vitus J. Leung, Hatem Ltaief, Naoya Maruyama, Chris J. Newburn, Miquel Pericàs

IEEE Trans. Parallel Distributed Syst., 2017

Runtime-Assisted Global Cache Management for Task-Based Parallel Programs.

Madhavan Manivannan, Miquel Pericàs, Vassilis Papaefstathiou, Per Stenström

IEEE Comput. Archit. Lett., 2017

SWAS: Stealing Work Using Approximate System-Load Information.

Stavros Tzilis, Miquel Pericàs, Pedro Trancoso, Ioannis Sourdis

Proceedings of the 46th International Conference on Parallel Processing Workshops, 2017

2016

Scaling FMM with Data-Driven OpenMP Tasks on Multicore Architectures.

Abdelhalim Amer, Satoshi Matsuoka, Miquel Pericàs, Naoya Maruyama, Kenjiro Taura, Rio Yokota, Pavan Balaji

Proceedings of the OpenMP: Memory, Devices, and Tasks, 2016

RADAR: Runtime-assisted dead region management for last-level caches.

Madhavan Manivannan, Vassilis Papaefstathiou, Miquel Pericàs, Per Stenström

Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016

POSTER: ξ-TAO: A Cache-centric Execution Model and Runtime for Deep Parallel Multicore Topologies.

Miquel Pericàs

Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016

2015

DAGViz: a DAG visualization tool for analyzing task-parallel program traces.

An Huynh, Douglas Thain, Miquel Pericàs, Kenjiro Taura

Proceedings of the 2nd Workshop on Visual Performance Analysis, 2015

Self-Tuned Software-Managed Energy Reduction in InfiniBand Links.

Branimir Dickov, Paul M. Carpenter, Miquel Pericàs, Eduard Ayguadé

Proceedings of the 21st IEEE International Conference on Parallel and Distributed Systems, 2015

2014

Analyzing Performance Improvements and Energy Savings in Infiniband Architecture using Network Compression.

Branimir Dickov, Miquel Pericàs, Paul M. Carpenter, Nacho Navarro, Eduard Ayguadé

Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing, 2014

Scalable analysis of multicore data reuse and sharing.

Miquel Pericàs, Kenjiro Taura, Satoshi Matsuoka

Proceedings of the 2014 International Conference on Supercomputing, 2014

Software-Managed Power Reduction in Infiniband Links.

Branimir Dickov, Miquel Pericàs, Paul M. Carpenter, Nacho Navarro, Eduard Ayguadé

Proceedings of the 43rd International Conference on Parallel Processing, 2014

Efficient String Sorting on Multi - and Many-Core Architectures.

Aleksandr Drozd, Miquel Pericàs, Satoshi Matsuoka

Proceedings of the 2014 IEEE International Congress on Big Data, Anchorage, AK, USA, June 27, 2014

2013

Guest editorial: Workshop on Reconfigurable Computing.

Ioannis Sourdis, Christos-Savvas Bouganis, Miquel Pericàs

J. Syst. Archit., 2013

A template system for the efficient compilation of domain abstractions onto reconfigurable computers.

Muhammad Shafiq, Miquel Pericàs, Nacho Navarro, Eduard Ayguadé

J. Syst. Archit., 2013

Fork-Join and Data-Driven Execution Models on Multi-core Architectures: Case Study of the FMM.

Abdelhalim Amer, Naoya Maruyama, Miquel Pericàs, Kenjiro Taura, Rio Yokota, Satoshi Matsuoka

Proceedings of the Supercomputing - 28th International Supercomputing Conference, 2013

Analysis of Data Reuse in Task-Parallel Runtimes.

Miquel Pericàs, Abdelhalim Amer, Kenjiro Taura, Satoshi Matsuoka

Proceedings of the High Performance Computing Systems. Performance Modeling, Benchmarking and Simulation, 2013

2012

Assessing the Impact of Network Compression on Molecular Dynamics and Finite Element Methods.

Branimir Dickov, Miquel Pericàs, Guillaume Houzeaux, Nacho Navarro, Eduard Ayguadé

Proceedings of the 14th IEEE International Conference on High Performance Computing and Communication & 9th IEEE International Conference on Embedded Software and Systems, 2012

PPMC: Hardware scheduling and memory management support for multi accelerators.

Tassadaq Hussain, Miquel Pericàs, Nacho Navarro, Eduard Ayguadé

Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

BSArc: blacksmith streaming architecture for HPC accelerators.

Muhammad Shafiq, Miquel Pericàs, Nacho Navarro, Eduard Ayguadé

Proceedings of the Computing Frontiers Conference, CF'12, 2012

PPMC: A Programmable Pattern Based Memory Controller.

Tassadaq Hussain, Muhammad Shafiq, Miquel Pericàs, Nacho Navarro, Eduard Ayguadé

Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2012

2011

Assessing Accelerator-Based HPC Reverse Time Migration.

Mauricio Araya-Polo, Javier Cabezas, Mauricio Hanzich, Miquel Pericàs, Félix Rubio, Isaac Gelado, Muhammad Shafiq, Enric Morancho, Nacho Navarro, Eduard Ayguadé, José María Cela, Mateo Valero

IEEE Trans. Parallel Distributed Syst., 2011

Implementation of a hierarchical N-body simulator using the Ompss programming model.

Miquel Pericàs, Xavier Martorell, Yoav Etsion

Proceedings of the first workshop on Irregular applications: architectures and algorithm, 2011

TARCAD: A template architecture for reconfigurable accelerator designs.

Muhammad Shafiq, Miquel Pericàs, Nacho Navarro, Eduard Ayguadé

Proceedings of the IEEE 9th Symposium on Application Specific Processors, 2011

Implementation of a Reverse Time Migration kernel using the HCE High Level Synthesis tool.

Tassadaq Hussain, Miquel Pericàs, Nacho Navarro, Eduard Ayguadé

Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011

2010

FEM: A Step Towards a Common Memory Layout for FPGA Based Accelerators.

Muhammad Shafiq, Miquel Pericàs, Nacho Navarro, Eduard Ayguadé

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

2009

Exploiting memory customization in FPGA for 3D stencil computations.

Muhammad Shafiq, Miquel Pericàs, Raúl de la Cruz, Mauricio Araya-Polo, Nacho Navarro, Eduard Ayguadé

Proceedings of the 2009 International Conference on Field-Programmable Technology, 2009

2008

Affordable kilo-instruction processors.

Miquel Pericàs

PhD thesis, 2008

Power-efficient VLIW design using clustering and widening.

Miquel Pericàs, Eduard Ayguadé, Javier Zalamea, Josep Llosa, Mateo Valero

Int. J. Embed. Syst., 2008

Vectorized AES Core for High-throughput Secure Environments.

Miquel Pericàs, Ricardo Chaves, Georgi Gaydadjiev, Stamatis Vassiliadis, Mateo Valero

Proceedings of the High Performance Computing for Computational Science, 2008

A Two-Level Load/Store Queue Based on Execution Locality.

Miquel Pericàs, Adrián Cristal, Francisco J. Cazorla, Rubén González, Alexander V. Veidenbaum, Daniel A. Jiménez, Mateo Valero

Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008), 2008

2007

A Flexible Heterogeneous Multi-Core Architecture.

Miquel Pericàs, Adrián Cristal, Francisco J. Cazorla, Rubén González, Daniel A. Jiménez, Mateo Valero

Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007

2006

A decoupled KILO-instruction processor.

Miquel Pericàs, Adrián Cristal, Rubén González, Daniel A. Jiménez, Mateo Valero

Proceedings of the 12th International Symposium on High-Performance Computer Architecture, 2006

2005

Kilo-Instruction Processors: Overcoming the Memory Wall.

Adrián Cristal, Oliverio J. Santana, Francisco J. Cazorla, Marco Galluzzi, Tanausú Ramírez, Miquel Pericàs, Mateo Valero

IEEE Micro, 2005

Chained In-Order/Out-of-Order DoubleCore Architecture.

Miquel Pericàs, Adrián Cristal, Rubén González, Daniel A. Jiménez

Proceedings of the 17th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2005), 2005

Decoupled State-Execute Architecture.

Miquel Pericàs, Adrián Cristal, Rubén González, Alexander V. Veidenbaum, Mateo Valero

Proceedings of the High-Performance Computing - 6th International Symposium, 2005

Exploiting Execution Locality with a Decoupled Kilo-Instruction Processor.

Miquel Pericàs, Adrián Cristal, Rubén González, Daniel A. Jiménez, Mateo Valero

Proceedings of the High-Performance Computing - 6th International Symposium, 2005

An asymmetric clustered processor based on value content.

Rubén González, Adrián Cristal, Miquel Pericàs, Mateo Valero, Alexander V. Veidenbaum

Proceedings of the 19th Annual International Conference on Supercomputing, 2005

2004

High-performance and low-power VLIW cores for numerical computations.

Miquel Pericàs, Eduard Ayguadé, Javier Zalamea, Josep Llosa, Mateo Valero

Int. J. High Perform. Comput. Netw., 2004

Performance and Power Evaluation of Clustered VLIW Processors with Wide Functional Units.

Miquel Pericàs, Eduard Ayguadé, Javier Zalamea, Josep Llosa, Mateo Valero

Proceedings of the Computer Systems: Architectures, 2004

An Optimized Front-End Physical Register File with Banking and Writeback Filtering.

Miquel Pericàs, Rubén González, Adrián Cristal, Alexander V. Veidenbaum, Mateo Valero

Proceedings of the Power-Aware Computer Systems, 4th International Workshop, 2004

2003

Power-Performance Trade-Offs in Wide and Clustered VLIW Cores for Numerical Codes.

Miquel Pericàs, Eduard Ayguadé, Javier Zalamea, Josep Llosa, Mateo Valero

Proceedings of the High Performance Computing, 5th International Symposium, 2003