Minzhe Tang

Orcid: 0009-0003-0087-4752

According to our database1, Minzhe Tang authored at least 12 papers between 2020 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2025
A 4-Stream 8-Element Time-Division MIMO Phased-Array Receiver for 5G NR and Beyond Achieving 9.6Gbps Data Rate.
Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

A Tri-Mode Harmonic-Selection Mixer with Multiphase LO Supporting 24.25-71GHz for Multi-Band 5G NR.
Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

2024
A 28GHz 4-Stream Time-Division MIMO Phased-Array Receiver Utilizing Nyquist-Rate Fast Beam Switching for 5G and Beyond.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

A 24-71-GHz Tri-Mode Mixer Using Harmonic Selection for Multi-Band 5G NR.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

IIPC: Intra-Inter Patch Correlations for Garment Collision Handling.
Proceedings of the IEEE International Conference on Multimedia and Expo, 2024

2023
A 39-GHz CMOS Bidirectional Doherty Phased- Array Beamformer Using Shared-LUT DPD With Inter-Element Mismatch Compensation Technique for 5G Base Station.
IEEE J. Solid State Circuits, 2023

2022
A Power-Efficient CMOS Multi-Band Phased-Array Receiver Covering 24-71-GHz Utilizing Harmonic-Selection Technique With 36-dB Inter-Band Blocker Tolerance for 5G NR.
IEEE J. Solid State Circuits, 2022

A 39-GHz CMOS Bi-Directional Doherty Phased-Array Beamformer Using Shared-LUT DPD with Inter-Element Mismatch Compensation Technique for 5G Base-Station.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

A Power-Efficient 24-to-71 GHz CMOS Phased-Array Receiver Utilizing Harmonic-Selection Technique Supporting 36dB Inter-Band Blocker Rejection for 5G NR.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

A 28GHz Area-Efficient CMOS Vector-Summing Phase Shifter Utilizing Phase-Inverting Type-I Poly-Phase Filter for 5G New Radio.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

2021
A 56-Gb/s PAM4 Receiver Analog Front-End With Fixed Peaking Frequency and Bandwidth in 40-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

2020
Fully-Differential 100-Gb/s PAM4 Cross-Coupled Regulated Transimpedance Amplifier.
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020


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