Minsu Choi
Orcid: 0000-0001-7672-3983
According to our database1,
Minsu Choi
authored at least 92 papers
between 2001 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
IEEE Trans. Veh. Technol., July, 2024
2023
On Encapsulated Dielectric Barrier Discharge Plasma Sources for Radar Cross Section Reduction in Mobile Environments.
Sensors, November, 2023
Compensation of Heat Effect in Dielectric Barrier Discharge (DBD) Plasma System for Radar Cross-Section (RCS) Reduction.
Sensors, August, 2023
Development of the Tele-Measurement of Plasma Uniformity via Surface Wave Information (TUSI) Probe for Non-Invasive In-Situ Monitoring of Electron Density Uniformity in Plasma Display Fabrication Process.
Sensors, March, 2023
IEEE Trans. Netw. Sci. Eng., 2023
Proceedings of the 20th International SoC Design Conference, 2023
Proceedings of the 20th International SoC Design Conference, 2023
Improved Estimation Method for Effect of DBD (Dielectric Barrier Discharge) Plasma on RCS (Radar Cross Section) Reduction.
Proceedings of the International Conference on Electronics, Information, and Communication, 2023
2022
Refined Appearance Potential Mass Spectrometry for High Precision Radical Density Quantification in Plasma.
Sensors, 2022
Proceedings of the 19th International SoC Design Conference, 2022
Proceedings of the 19th International SoC Design Conference, 2022
Multipath TCP Control Scheme for Low Latency and High Speed XR Real-Time M&S Devices.
Proceedings of the IEEE International Conference on Consumer Electronics, 2022
Partial Offloading MEC Optimization Scheme using Deep Reinforcement Learning for XR Real-Time M&S Devices.
Proceedings of the IEEE International Conference on Consumer Electronics, 2022
2021
Multi-UAV Trajectory Optimization Considering Collisions in FSO Communication Networks.
IEEE J. Sel. Areas Commun., 2021
Proceedings of the 18th International SoC Design Conference, 2021
Proceedings of the 18th International SoC Design Conference, 2021
Proceedings of the 18th International SoC Design Conference, 2021
2020
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
Proceedings of the International SoC Design Conference, 2020
An Ultra-Low-Power Tunable Bump Circuit using Source-Degenerated Differential Transconductor.
Proceedings of the International SoC Design Conference, 2020
2019
Multipath Based Adaptive Concurrent Transfer for Real-Time Video Streaming Over 5G Multi-RAT Systems.
IEEE Access, 2019
Proceedings of the 2019 International SoC Design Conference, 2019
Proceedings of the 2019 International SoC Design Conference, 2019
2018
Proceedings of the 9th ACM Multimedia Systems Conference, 2018
Proceedings of the 9th ACM Multimedia Systems Conference, 2018
Generalized Adaptive Variable Bit Truncation Method for Approximate Stochastic Computing.
Proceedings of the International SoC Design Conference, 2018
Low-Power Null Convention Logic Multiplier Design Based On Gate Diffusion Input Technique.
Proceedings of the International SoC Design Conference, 2018
Proceedings of the 2018 IEEE International Conference on Multimedia & Expo Workshops, 2018
2017
Proceedings of the International SoC Design Conference, 2017
Low-power null convention logic design based on modified gate diffusion input technique.
Proceedings of the International SoC Design Conference, 2017
An optical transceiver design for long-path broadband differential optical absorption spectroscopy.
Proceedings of the Eleventh International Conference on Sensing Technology, 2017
2016
IEEE Trans. Consumer Electron., 2016
Proceedings of the International SoC Design Conference, 2016
Proceedings of the International SoC Design Conference, 2016
Proceedings of the International SoC Design Conference, 2016
2015
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
2014
Asynchronous Advanced Encryption Standard Hardware with Random Noise Injection for Improved Side-Channel Attack Resistance.
J. Electr. Comput. Eng., 2014
Design, Test, and Repair of MLUT (Memristor Look-Up Table) Based Asynchronous Nanowire Reconfigurable Crossbar Architecture.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2014
2013
High Performance and Hardware Efficient Multiview Video Coding Frame Scheduling Algorithms and Architectures.
IEEE Trans. Circuits Syst. Video Technol., 2013
Workload-dependent relative fault sensitivity and error contribution factor of GPU onchip memory structures.
Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013
Low complexity image correction using color and focus matching for stereo video coding.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
2012
IEEE Trans. Instrum. Meas., 2012
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
A high speed low power modulo 2<sup>n</sup>+1 multiplier design using carbon-nanotube technology.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
Design and evaluation of Side Channel Attack resistant asynchronous AES Round Function.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
Low-complexity frame scheduler using shared frame memory for multi-view video coding.
Proceedings of the International SoC Design Conference, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012
2011
IEEE Trans. Computers, 2011
Learning nanotechnology through crossbar-based architecture and Carbon Nanotube(CNT) FETs.
Proceedings of the 2011 IEEE International Conference on Microelectronic Systems Education, 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
2010
IEEE Trans. Instrum. Meas., 2010
Reliability Modeling and Analysis of Clockless Wave Pipeline Core for Embedded Combinational Logic Design.
IEEE Trans. Instrum. Meas., 2010
Latency/area analysis and optimization of asynchronous nanowire reconfigurable crossbar system.
Nano Commun. Networks, 2010
Low-power side-channel attack-resistant asynchronous S-box design for AES cryptosystems.
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010
2009
IEEE Trans. Very Large Scale Integr. Syst., 2009
2008
Cost-driven repair optimization of reconfigurable nanowire crossbar systems with clustered defects.
J. Syst. Archit., 2008
Scalability of Globally Asynchronous QCA (Quantum-Dot Cellular Automata) Adder Design.
J. Electron. Test., 2008
2007
Cost-Driven Optimization of Coverage of Combined Built-In Self-Test/Automated Test Equipment Testing.
IEEE Trans. Instrum. Meas., 2007
Designing layout-timing independent quantum-dot cellular automata (QCA) circuits by global asynchrony.
J. Syst. Archit., 2007
Defect-Tolerant Gate Macro Mapping & Placement in Clock-Free Nanowire Crossbar Architecture.
Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007
2006
Oxidase-coupled amperometric glucose and lactate sensors with integrated electrochemical actuation system.
IEEE Trans. Instrum. Meas., 2006
Inherited Redundancy and Configurability Utilization for Repairing Nanowire Crossbars with Clustered Defects.
Proceedings of the 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 2006
Proceedings of the 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 2006
2005
Environmental-based characterization of SoC-based instrumentation systems for stratified testing.
IEEE Trans. Instrum. Meas., 2005
IEEE Trans. Instrum. Meas., 2005
Teaching Nanotechnology by Introducing Crossbar-Based Architecture and Quantum-Dot Cellular Automata.
Proceedings of the 2005 International Conference on Microelectronics Systems Education, 2005
Proceedings of the 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 2005
2004
IEEE Trans. Instrum. Meas., 2004
J. Syst. Archit., 2004
Probabilistic Balancing of Fault Coverage and Test Cost in Combined Built-In Self-Test/Automated Test Equipment Testing Environment.
Proceedings of the 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 2004
Modeling Yield of Carbon-Nanotube/Silicon-Nanowire FET-Based Nanoarray Architecture with h-hot Addressing Scheme.
Proceedings of the 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 2004
2003
IEEE Trans. Instrum. Meas., 2003
IEEE Trans. Instrum. Meas., 2003
IEEE Des. Test Comput., 2003
Fault Tolerant Memory Design for HW/SW Co-Reliability in Massively Parallel Computing Systems.
Proceedings of the 2nd IEEE International Symposium on Network Computing and Applications (NCA 2003), 2003
Proceedings of the 11th IEEE International Workshop on Memory Technology, 2003
Need For Undergraduate And Graduate-Level Education In Testing Of Microelectronic Circuits And Systems.
Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003
Proceedings of the 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 2003
2002
Quality enhancement of reconfigurable multichip module systems by redundancy utilization.
IEEE Trans. Instrum. Meas., 2002
IEEE Trans. Instrum. Meas., 2002
Proceedings of the 9th Pacific Rim International Symposium on Dependable Computing (PRDC 2002), 2002
Hardware-Software Co-Reliability in Field Reconfigurable Multi-Processor-Memory Systems.
Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002
Proceedings of the 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 2002
Proceedings of the 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 2002
2001
Proceedings of the 8th Pacific Rim International Symposium on Dependable Computing (PRDC 2001), 2001