Minkyo Shim

Orcid: 0000-0001-5345-6261

According to our database1, Minkyo Shim authored at least 17 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
A 0.09-pJ/b/dB 28-Gb/s Digital CDR With ISI-Resistant Phase Detector.
IEEE Trans. Circuits Syst. II Express Briefs, November, 2024

A 50-Gb/s PAM-4 Receiver With Adaptive Phase-Shifting CDR in 28-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., August, 2024

2023
A 0.99-pJ/b 10-Gb/s Receiver With Fast Recovery From Sleep Mode Under Voltage Drift.
IEEE Trans. Circuits Syst. II Express Briefs, November, 2023

An 80-Gb/s PAM-4 Simultaneous Bidirectional Transceiver With Hybrid Adaptation Scheme.
IEEE Trans. Circuits Syst. II Express Briefs, August, 2023

A 1.1-pJ/b 8-to-16-Gb/s Receiver With Stochastic CTLE Adaptation.
IEEE Trans. Circuits Syst. II Express Briefs, February, 2023

A 12-Gbps, 0.24-pJ/b/dB PAM-4 Receiver With Dead-Zone Free SS-MMSE PD for CIS Link.
IEEE Access, 2023

An 8-GHz Octa-Phase Clock Corrector with Phase and Duty-Cycle Correction in 40-nm CMOS.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

A 14-28 Gb/s Reference-less Baud-rate CDR with Integrator-based Stochastic Phase and Frequency Detector.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022
A 64-Gb/s PAM-4 Receiver With Transition-Weighted Phase Detector.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Area and Power Efficient 10B6Q PAM-4 DC Balance Coder for Automotive Camera Link.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Design Techniques for a 6.4-32-Gb/s 0.96-pJ/b Continuous-Rate CDR With Stochastic Frequency-Phase Detector.
IEEE J. Solid State Circuits, 2022

0.41-pJ/b/dB Asymmetric Simultaneous Bidirectional Transceivers With PAM-4 Forward and PAM-2 Back Channels for 5-m Automotive Camera Link.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2021
A Stochastic Variable Gain Amplifier Adaptation for PAM-4 signaling.
Proceedings of the 18th International SoC Design Conference, 2021

A Sequential Two-step Algorithm For DC Offset Cancellation of PAM-4 Receiver.
Proceedings of the 18th International SoC Design Conference, 2021

0.37-pJ/b/dB PAM-4 Transmitter and Adaptive Receiver with Fixed Data and Threshold Levels for 12-m Automotive Camera Link.
Proceedings of the 47th ESSCIRC 2021, 2021

2020
6.5 A 6.4-to-32Gb/s 0.96pJ/b Referenceless CDR Employing ML-Inspired Stochastic Phase-Frequency Detection Technique in 40nm CMOS.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2019
A 2.5-28 Gb/s Multi-Standard Transmitter With Two-Step Time-Multiplexing Driver.
IEEE Trans. Circuits Syst. II Express Briefs, 2019


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