Minki Cho
Orcid: 0000-0002-6684-0921
According to our database1,
Minki Cho
authored at least 45 papers
between 2006 and 2024.
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Bibliography
2024
Adaptive Clock Gating for Improving Wear out induced Duty Cycle Shift in the Clock Network.
Proceedings of the IEEE International Reliability Physics Symposium, 2024
2023
Proc. ACM Program. Lang., 2023
Proceedings of the 12th IEEE Global Conference on Consumer Electronics, 2023
2022
Proceedings of the PLDI '22: 43rd ACM SIGPLAN International Conference on Programming Language Design and Implementation, San Diego, CA, USA, June 13, 2022
Proceedings of the IEEE International Reliability Physics Symposium, 2022
Measuring colorant fading within raster regions of printed scanned customer content using a novel unsupervised clustering method.
Proceedings of the Color Imaging XXVII: Displaying, 2022
2021
A Back-Sampling Chain Technique for Accelerated Detection, Characterization, and Reconstruction of Radiation-Induced Transient Pulses.
IEEE Trans. Very Large Scale Integr. Syst., 2021
CoRR, 2021
Proceedings of the PLDI '21: 42nd ACM SIGPLAN International Conference on Programming Language Design and Implementation, 2021
Proceedings of the Color Imaging XXVI: Displaying, 2021
Proceedings of the Color Imaging XXVI: Displaying, 2021
2020
Proc. ACM Program. Lang., 2020
An All-Digital, $V_{\mathrm{MAX}}$ -Compliant, Stable, and Scalable Distributed Charge Injection Scheme in 10-nm CMOS for Fast and Local Mitigation of Voltage Droop.
IEEE J. Solid State Circuits, 2020
Proceedings of the 41st ACM SIGPLAN International Conference on Programming Language Design and Implementation, 2020
Proceedings of the Image Quality and System Performance XVII, Electronic Imaging 2020, 2020
Proceedings of the Image Quality and System Performance XVII, Electronic Imaging 2020, 2020
2019
An Energy-Efficient Graphics Processor in 14-nm Tri-Gate CMOS Featuring Integrated Voltage Regulators for Fine-Grain DVFS, Retentive Sleep, and ${V}_{\text{MIN}}$ Optimization.
IEEE J. Solid State Circuits, 2019
Proceedings of the Image Quality and System Performance XVI, Electronic Imaging 2019, 2019
Proceedings of the Image Quality and System Performance XVI, Electronic Imaging 2019, 2019
Cost-function-based repetitive interval estimation method with synthetic missing bands for periodic bands in electrophotographic printer.
Proceedings of the Image Quality and System Performance XVI, Electronic Imaging 2019, 2019
An All-Digital, VMAX-Compliant, and Stable Distributed Charge Injection Scheme for Fast Mitigation of Voltage Droop.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019
2018
An energy-efficient graphics processor featuring fine-grain DVFS with integrated voltage regulators, execution-unit turbo, and retentive sleep in 14nm tri-gate CMOS.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
2017
Postsilicon Voltage Guard-Band Reduction in a 22 nm Graphics Execution Core Using Adaptive Voltage Scaling and Dynamic Power Gating.
IEEE J. Solid State Circuits, 2017
2016
Adaptive clocking with dynamic power gating for mitigating energy efficiency & performance impacts of fast voltage droop in a 22nm graphics execution core.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
8.4 Post-silicon voltage-guard-band reduction in a 22nm graphics execution core using adaptive voltage scaling and dynamic power gating.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
2015
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
2014
Characterization of radiation-induced SRAM and logic soft errors from 0.33V to 1.0V in 65nm CMOS.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014
2013
Proceedings of the Design, Automation and Test in Europe, 2013
2012
Low-power design under variation using error prevention and error tolerance (invited paper).
Proceedings of the 13th Latin American Test Workshop, 2012
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012
2011
Reconfigurable SRAM Architecture With Spatial Voltage Scaling for Low Power Mobile Multimedia Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2011
2010
IEEE Des. Test Comput., 2010
Optimization of burn-in test for many-core processors through adaptive spatiotemporal power migration.
Proceedings of the 2011 IEEE International Test Conference, 2010
Signal processing methods and hardware-structure for on-line characterization of thermal gradients in many-core processors.
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010
Design method and test structure to characterize and repair TSV defect induced signal degradation in 3D system.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
2009
Accuracy-aware SRAM: a reconfigurable low power SRAM architecture for mobile multimedia applications.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009
2008
Analysis of the impact of interfacial oxide thickness variation on metal-gate high-K circuits.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008
2007
Proceedings of the Color Imaging XII: Processing, Hardcopy, and Applications, San Jose, 2007
2006
Proceedings of the Color Imaging XI: Processing, Hardcopy, and Applications, San Jose, 2006
Proceedings of the Color Imaging XI: Processing, Hardcopy, and Applications, San Jose, 2006