Minh Quang Do
According to our database1,
Minh Quang Do
authored at least 5 papers
between 2003 and 2007.
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Bibliography
2007
Leakage-Conscious Architecture-Level Power Estimation for Partitioned and Power-Gated SRAM Arrays.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007
High-Accuracy Architecture-Level Power Estimation for Partitioned SRAM Arrays in a 65-nm CMOS BPTM Process.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007
2006
Parameterizable Architecture-Level SRAM Power Model Using Circuit-Simulation Backend for Leakage Calibration.
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006
2004
Proceedings of the Integrated Circuit and System Design, 2004
2003
DSP-PP: A Simulator/Estimator of Power Consumption and Performance for Parallel DSP Architectures.
Proceedings of the 21st IASTED International Multi-Conference on Applied Informatics (AI 2003), 2003