Ming Zhang

Affiliations:
  • Intel, CA, USA
  • University of Illinois at Urbana-Champaign, IL, USA (PhD 2006)


According to our database1, Ming Zhang authored at least 11 papers between 2005 and 2008.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2008
Hierarchical Test Compression for SoC Designs.
IEEE Des. Test Comput., 2008

2007
Design for Resilience to Soft Errors and Variations.
Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007

2006
Analysis and Design of Soft-Error Tolerant Circuits
PhD thesis, 2006

Sequential Element Design With Built-In Soft Error Resilience.
IEEE Trans. Very Large Scale Integr. Syst., 2006

Dual-Sampling Skewed CMOS Design for Soft-Error Tolerance.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

Soft-Error-Rate-Analysis (SERA) Methodology.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Soft Error Resilient System Design through Error Correction.
Proceedings of the VLSI-SoC: Research Trends in VLSI and Systems on Chip, 2006

Combinational Logic Soft Error Correction.
Proceedings of the 2006 IEEE International Test Conference, 2006

2005
Subhasish Mitra, Norbert Seifert, Ming Zhang, Quan Shi, Kee Sup Kim.
Computer, 2005

Logic soft errors: a major barrier to robust platform design.
Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

An energy-efficient circuit technique for single event transient noise-tolerance.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005


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