Ming-Tung Chang

According to our database¹, Ming-Tung Chang authored at least 7 papers between 2005 and 2016.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

Timeline

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PhD thesis

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Bibliography

2016

Statistical methodology to identify optimal placement of on-chip process monitors for predicting fmax.

[BibT_eX]

[DOI]

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

2013

Testing retention flip-flops in power-gated designs.

[BibT_eX]

[DOI]

Proceedings of the 31st IEEE VLSI Test Symposium, 2013

2011

Test clock domain optimization for peak power supply noise reduction during scan.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE International Test Conference, 2011

2010

TSV redundancy: Architecture and design issues in 3D IC.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2010

2009

BIST design optimization for large-scale embedded memory cores.

[BibT_eX]

[DOI]

Proceedings of the 2009 International Conference on Computer-Aided Design, 2009

2008

Capture and Shift Toggle Reduction (CASTR) ATPG to Minimize Peak Power Supply Noise.

[BibT_eX]

[DOI]

Proceedings of the 2008 IEEE International Test Conference, 2008

2005

UltraScan: using time-division demultiplexing/multiplexing (TDDM/TDM) with VirtualScan for test cost reduction.

[BibT_eX]

[DOI]

Laung-Terng Wang

Khader S. Abdel-Hafez

Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

Ming-Tung Chang

Timeline

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Links

On csauthors.net:

Bibliography

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