Ming-Shuan Chen

According to our database, Ming-Shuan Chen authored at least 11 papers between 2008 and 2015.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2015

A 32-48 Gb/s Serializing Transmitter Using Multiphase Serialization in 65 nm CMOS Technology.

Amr Amin Hafez, Ming-Shuan Chen, Chih-Kong Ken Yang

IEEE J. Solid State Circuits, 2015

A 50-64 Gb/s Serializing Transmitter With a 4-Tap, LC-Ladder-Filter-Based FFE in 65 nm CMOS Technology.

Ming-Shuan Chen, Chih-Kong Ken Yang

IEEE J. Solid State Circuits, 2015

A low-PDP and low-area repeater using passive CTLE for on-chip interconnects.

Ming-Shuan Chen, Mau-Chung Frank Chang, Chih-Kong Ken Yang

Proceedings of the Symposium on VLSI Circuits, 2015

2014

A 50-64 Gb/s serializing transmitter with a 4-tap, LC-ladder-filter-based FFE in 65-nm CMOS.

Ming-Shuan Chen, Chih-Kong Ken Yang

Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2013

A 0.1-1.5 GHz 8-bit Inverter-Based Digital-to-Phase Converter Using Harmonic Rejection.

Ming-Shuan Chen, Amr Amin Hafez, Chih-Kong Ken Yang

IEEE J. Solid State Circuits, 2013

A 32-to-48Gb/s serializing transmitter using multiphase sampling in 65nm CMOS.

Amr Amin Hafez, Ming-Shuan Chen, Chih-Kong Ken Yang

Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012

A Fully-Integrated 40-Gb/s Transceiver in 65-nm CMOS Technology.

Ming-Shuan Chen, Yu-Nan Shih, Chen-Lun Lin, Hao-Wei Hung, Jri Lee

IEEE J. Solid State Circuits, 2012

A low-power highly multiplexed parallel PRBS generator.

Ming-Shuan Chen, Chih-Kong Ken Yang

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011

A 40Gb/s TX and RX chip set in 65nm CMOS.

Ming-Shuan Chen, Yu-Nan Shih, Chen-Lun Lin, Hao-Wei Hung, Jri Lee

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2008

Design and Comparison of Three 20-Gb/s Backplane Transceivers for Duobinary, PAM4, and NRZ Data.

Jri Lee, Ming-Shuan Chen, Huaide Wang

IEEE J. Solid State Circuits, 2008

A 20Gb/s Duobinary Transceiver in 90nm CMOS.

Jri Lee, Ming-Shuan Chen, Huaide Wang

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008