Min-Sheng Kao

According to our database1, Min-Sheng Kao authored at least 12 papers between 2005 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2014
20-Gb/s CMOS EA/MZ Modulator Driver With Intrinsic Parasitic Feedback Network.
IEEE Trans. Very Large Scale Integr. Syst., 2014

A 10-Gb/s Low Jitter Single-Loop Clock and Data Recovery Circuit With Rotational Phase Frequency Detector.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

2013
Low Propagation Delay Load-Balanced 4 × 4 Switch Fabric IC in 0.13-µm CMOS Technology.
IEEE Trans. Very Large Scale Integr. Syst., 2013

2012
An 8 × 8 20 Gbps Reconfigurable Load Balanced TDM Switch IC for High-Speed Networking.
J. Signal Process. Syst., 2012

2011
A 10 to 11.5GHz rotational phase and frequency detector for clock recovery circuit.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A 32Gbps low propagation delay 4×4 switch IC for feedback-based system in 0.13μm CMOS technology.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010
A 32Gbps low propagation delay 4×4 switch IC for feedback-based system in 0.13μm CMOS technology.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
A 10-Gb/s CML I/O Circuit for Backplane Interconnection in 0.18-µm CMOS Technology.
IEEE Trans. Very Large Scale Integr. Syst., 2009

2008
A 28Gbps 4×4 switch with low jitter SerDes using area-saving RF model in 0.13µm CMOS technology.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
A Scalable Load Balanced Birkhoff-von Neumann Symmetric TDM Switch IC for High-Speed Networking Applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A 20 Gbps Scalable Load Balanced Birkhoff-von Neumann Symmetric TDM Switch IC with SERDES Interfaces.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2005
A 10 Gb/s Wide-Band Current-Mode Logic I/O Interface for High-Speed Interconnect in 0.18μm CMOS Technology.
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005


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