Min-Jae Seo
Orcid: 0000-0003-1858-1416
According to our database1,
Min-Jae Seo
authored at least 17 papers
between 2015 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
Proceedings of the International Conference on Electronics, Information, and Communication, 2024
2023
An 81.2dB-SNDR Dual-Residue Pipeline ADC with a 2nd- Order Noise-Shaping Interpolating SAR ADC.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023
2022
IEEE J. Solid State Circuits, 2022
2020
IEEE Trans. Circuits Syst. II Express Briefs, 2020
A Single-Supply CDAC-Based Buffer-Embedding SAR ADC With Skip-Reset Scheme Having Inherent Chopping Capability.
IEEE J. Solid State Circuits, 2020
A 10 nV/rt Hz noise level 32-channel neural impedance sensing ASIC for local activation imaging on nerve section.
Proceedings of the 42nd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2020
2019
A Reference-Free Temperature-Dependency-Compensating Readout Scheme for Phase-Change Memory Using Flash-ADC-Configured Sense Amplifiers.
IEEE J. Solid State Circuits, 2019
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
A Single-Supply Buffer-Embedding SAR ADC with Skip-Reset having Inherent Chopping Capability.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019
2018
A Reusable Code-Based SAR ADC Design With CDAC Compiler and Synthesizable Analog Building Blocks.
IEEE Trans. Circuits Syst. II Express Briefs, 2018
A 18.5 nW 12-bit 1-kS/s Reset-Energy Saving SAR ADC for Bio-Signal Acquisition in 0.18-µm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
IEEE Trans. Circuits Syst. II Express Briefs, 2018
A 65 nm 0.08-to-680 MHz Low-Power Synthesizable MDLL With Nested-Delay Cell and Background Static Phase Offset Calibration.
IEEE Trans. Circuits Syst. II Express Briefs, 2018
A 4.2-mW 10-MHz BW 74.4-dB SNDR Continuous-Time Delta-Sigma Modulator With SAR-Assisted Digital-Domain Noise Coupling.
IEEE J. Solid State Circuits, 2018
2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
2016
A 0.6 V 12 b 10 MS/s Low-Noise Asynchronous SAR-Assisted Time-Interleaved SAR (SATI-SAR) ADC.
IEEE J. Solid State Circuits, 2016
2015
Proceedings of the ESSCIRC Conference 2015, 2015