Milos Prvulovic
Orcid: 0000-0002-5955-277XAffiliations:
- Georgia Institute of Technology, Atlanta GA, USA
According to our database1,
Milos Prvulovic
authored at least 83 papers
between 2001 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
Securing CPS Through Simultaneous Analog Side-Channel Monitoring of Cyber and Physical Domains.
IEEE Access, 2024
2023
MarCNNet: A Markovian Convolutional Neural Network for Malware Detection and Monitoring Multi-Core Systems.
IEEE Trans. Computers, April, 2023
Efficient Dissimilarity Detection in Time Series With Application to Side-Channel Analysis.
IEEE Access, 2023
Springer, ISBN: 978-3-031-38578-0, 2023
2022
IEEE Trans. Very Large Scale Integr. Syst., 2022
PITEM: Permutations-Based Instruction Tracking Via Electromagnetic Side-Channel Signal Analysis.
IEEE Trans. Computers, 2022
PRIMER: Profiling Interrupts Using Electromagnetic Side-Channel for Embedded Devices.
IEEE Trans. Computers, 2022
Leveraging On-Chip Transistor Switching for Communication and Sensing in Neural Implants and Gastrointestinal Devices.
IEEE Trans. Biomed. Eng., 2022
Novel Feature Selection for Non-destructive Detection of Hardware Trojans Using Hyperspectral Scanning.
J. Hardw. Syst. Secur., 2022
A generalized approach to estimation of memoryless covert channel information leakage capacity.
Array, 2022
A Hierarchical Approach for Multiple Periodicity Detection in Software Code Analysis.
IEEE Access, 2022
Circuit Activity Fingerprinting Using Electromagnetic Side-Channel Sensing and Digital Circuit Simulations.
IEEE Access, 2022
Hyperspectral Image Recovery via Reliability-Weighted Compressed Sensing for Hardware Trojan Detection.
IEEE Access, 2022
2021
IDEA: Intrusion Detection through Electromagnetic-Signal Analysis for Critical Embedded and Cyber-Physical Systems.
IEEE Trans. Dependable Secur. Comput., 2021
Deep Learning Classification of Motherboard Components by Leveraging EM Side-Channel Signals.
J. Hardw. Syst. Secur., 2021
A Hierarchical Subsequence Clustering Method for Tracking Program States in Spectrograms.
Proceedings of the 2021 IEEE Military Communications Conference, 2021
Nonce@Once: A Single-Trace EM Side Channel Attack on Several Constant-Time Elliptic Curve Implementations in Mobile Platforms.
Proceedings of the IEEE European Symposium on Security and Privacy, 2021
2020
Communication Model and Capacity Limits of Covert Channels Created by Software Activities.
IEEE Trans. Inf. Forensics Secur., 2020
Electromagnetic Side Channel Information Leakage Created by Execution of Series of Instructions in a Computer Processor.
IEEE Trans. Inf. Forensics Secur., 2020
REMOTE: Robust External Malware Detection Framework by Using Electromagnetic Signals.
IEEE Trans. Computers, 2020
A Comparison of Backscattering, EM, and Power Side-Channels and Their Performance in Detecting Software and Hardware Intrusions.
J. Hardw. Syst. Secur., 2020
Cell-Phone Classification: A Convolutional Neural Network Approach Exploiting Electromagnetic Emanations.
Proceedings of the 2020 IEEE International Conference on Acoustics, 2020
A New Side-Channel Vulnerability on Modern Computers by Exploiting Electromagnetic Emanations from the Power Management Unit.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020
EMSim: A Microarchitecture-Level Simulation Tool for Modeling Electromagnetic Side-Channel Signals.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020
A Novel Golden-Chip-Free Clustering Technique Using Backscattering Side Channel for Hardware Trojan Detection.
Proceedings of the 2020 IEEE International Symposium on Hardware Oriented Security and Trust, 2020
2019
Creating a Backscattering Side Channel to Enable Detection of Dormant Hardware Trojans.
IEEE Trans. Very Large Scale Integr. Syst., 2019
Hyperdimensional Bayesian Time Mapping (HyperBaT): A Probabilistic Approach to Time Series Mapping of Non-Identical Sequences.
IEEE Trans. Signal Process., 2019
Malware Detection in Embedded Systems Using Neural Network Model for Electromagnetic Side-Channel Signals.
J. Hardw. Syst. Secur., 2019
Detecting Cellphone Camera Status at Distance by Exploiting Electromagnetic Emanations.
Proceedings of the 2019 IEEE Military Communications Conference, 2019
EMMA: Hardware/Software Attestation Framework for Embedded Systems Using Electromagnetic Signals.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019
Proceedings of the 41st International Conference on Software Engineering, 2019
Forgive-TM: Supporting Lazy Conflict Detection In Eager Hardware Transactional Memory.
Proceedings of the 28th International Conference on Parallel Architectures and Compilation Techniques, 2019
2018
Capacity of the EM Covert/Side-Channel Created by the Execution of Instructions in a Processor.
IEEE Trans. Inf. Forensics Secur., 2018
One&Done: A Single-Decryption EM-Based Attack on OpenSSL's Constant-Time Blinded RSA.
Proceedings of the 27th USENIX Security Symposium, 2018
Proceedings of the 2018 IEEE Military Communications Conference, 2018
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018
Proceedings of the 2018 IEEE International Conference on Acoustics, 2018
Syndrome: Spectral analysis for anomaly detection on medical IoT and embedded devices.
Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018
Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques, 2018
2017
Quantifying information leakage in a processor caused by the execution of instructions.
Proceedings of the 2017 IEEE Military Communications Conference, 2017
Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017
2016
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016
Proceedings of the 25th International Symposium on Software Testing and Analysis, 2016
PleaseTM: Enabling transaction conflict management in requester-wins hardware transactional memory.
Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016
2015
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015
2014
A Practical Methodology for Measuring the Side-Channel Signal Available to the Attacker for Instruction-Level Events.
Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014
2013
Traffic steering between a low-latency unswitched TL ring and a high-throughput switched on-chip interconnect.
Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, 2013
2012
IEEE Trans. Computers, 2012
Euripus: A flexible unified hardware memory checkpointing accelerator for bidirectional-debugging and reliability.
Proceedings of the 39th International Symposium on Computer Architecture (ISCA 2012), 2012
2011
ACM Trans. Archit. Code Optim., 2011
Proceedings of the 38th International Symposium on Computer Architecture (ISCA 2011), 2011
Proceedings of the 33rd International Conference on Software Engineering, 2011
Proceedings of the 25th International Conference on Supercomputing, 2011, Tucson, AZ, USA, May 31, 2011
2010
Proceedings of the 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 2010
2009
ACM Trans. Archit. Code Optim., 2009
ACM Trans. Archit. Code Optim., 2009
2008
Proceedings of the 14th International Conference on High-Performance Computer Architecture (HPCA-14 2008), 2008
Proceedings of the 14th International Conference on High-Performance Computer Architecture (HPCA-14 2008), 2008
Single-level integrity and confidentiality protection for distributed shared memory multiprocessors.
Proceedings of the 14th International Conference on High-Performance Computer Architecture (HPCA-14 2008), 2008
2007
Using Address Independent Seed Encryption and Bonsai Merkle Trees to Make Secure Processors OS- and Performance-Friendly.
Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-40 2007), 2007
Proceedings of the 22nd IEEE/ACM International Conference on Automated Software Engineering (ASE 2007), 2007
MemTracker: Efficient and Programmable Support for Memory Access Monitoring and Debugging.
Proceedings of the 13st International Conference on High-Performance Computer Architecture (HPCA-13 2007), 2007
2006
HeapMon: A helper-thread approach to programmable, automatic, and low-overhead memory bug detection.
IBM J. Res. Dev., 2006
Proceedings of the 33rd International Symposium on Computer Architecture (ISCA 2006), 2006
CORD: cost-effective (and nearly overhead-free) order-recording and data race detection.
Proceedings of the 12th International Symposium on High-Performance Computer Architecture, 2006
Proceedings of the 1st Workshop on Architectural and System Support for Improving Software Dependability, 2006
Proceedings of the 12th International Conference on Architectural Support for Programming Languages and Operating Systems, 2006
Proceedings of the 15th International Conference on Parallel Architectures and Compilation Techniques (PACT 2006), 2006
2005
Tradeoffs in buffering speculative memory state for thread-level speculation in multiprocessors.
ACM Trans. Archit. Code Optim., 2005
SIGARCH Comput. Archit. News, 2005
Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005
2003
ReEnact: Using Thread-Level Speculation Mechanisms to Debug Data Races in Multithreaded Codes.
Proceedings of the 30th International Symposium on Computer Architecture (ISCA 2003), 2003
Proceedings of the Ninth International Symposium on High-Performance Computer Architecture (HPCA'03), 2003
Using Software Logging to Support Multi-Version Buffering in Thread-Level Speculation.
Proceedings of the 12th International Conference on Parallel Architectures and Compilation Techniques (PACT 2003), 27 September, 2003
2002
Proceedings of the 35th Annual International Symposium on Microarchitecture, 2002
ReVive: Cost-Effective Architectural Support for Rollback Recovery in Shared-Memory Multiprocessors.
Proceedings of the 29th International Symposium on Computer Architecture (ISCA 2002), 2002
SmartApps: An Application Centric Approach to High Performance Computing: Compiler-Assisted Software and Hardware Support for Reduction Operations.
Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002
2001
Removing architectural bottlenecks to the scalability of speculative parallelization.
Proceedings of the 28th Annual International Symposium on Computer Architecture, 2001
Proceedings of the 15th International Parallel & Distributed Processing Symposium (IPDPS-01), 2001
Architectural Support for Parallel Reductions in Scalable Shared-Memory Multiprocessors.
Proceedings of the 2001 International Conference on Parallel Architectures and Compilation Techniques (PACT 2001), 2001