Milind Sonawane
According to our database1,
Milind Sonawane
authored at least 7 papers
between 2014 and 2022.
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Bibliography
2022
Proceedings of the 40th IEEE VLSI Test Symposium, 2022
2019
Hybrid Performance Modeling for Optimization of In-System-Structural-Test (ISST) Latency.
Proceedings of the 37th IEEE VLSI Test Symposium, 2019
Proceedings of the 37th IEEE VLSI Test Symposium, 2019
2016
Proceedings of the 34th IEEE VLSI Test Symposium, 2016
Proceedings of the 34th IEEE VLSI Test Symposium, 2016
Proceedings of the 2016 IEEE International Test Conference, 2016
2014
Proceedings of the 2014 International Test Conference, 2014