Milena Vratonjic

According to our database, Milena Vratonjic authored at least 7 papers between 2005 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2018

Power and performance aware memory-controller voting mechanism.

Milena Vratonjic, Harmander Singh, Gautam Kumar, Roumi Mohamed, Ashish Bajaj, Ken Gainey

Proceedings of the 19th International Symposium on Quality Electronic Design, 2018

2015

Transistor-interconnect mobile system-on-chip co-design method for holistic battery energy minimization.

N. N. Mojumder, Seung Chul Song, K. Rim, J. Xu, Joseph Wang, J. Zhu, Milena Vratonjic, K. Lin, Martin Saint-Laurent, Paul Bassett, Geoffrey Yeap

Proceedings of the Symposium on VLSI Circuits, 2015

2009

A New Methodology for Power-Aware Transistor Sizing: Free Power Recovery (FPR).

Milena Vratonjic, Matthew M. Ziegler, George Gristede, Victor V. Zyuban, Thomas Mitchell, Ee Cho, Chandu Visweswariah, Vojin G. Oklobdzija

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2009

The opportunity cost of low power design: a case study in circuit tuning.

Matthew M. Ziegler, Victor V. Zyuban, George Gristede, Milena Vratonjic, Joshua Friedrich

Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009

2008

Energy Efficiency of Power-Gating in Low-Power Clocked Storage Elements.

Christophe Giacomotto, Mandeep Singh, Milena Vratonjic, Vojin G. Oklobdzija

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008

2006

Circuit Sizing and Supply-Voltage Selection for Low-Power Digital Circuit Design.

Milena Vratonjic, Bart R. Zeydel, Vojin G. Oklobdzija

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

2005

Low- and Ultra Low-Power Arithmetic Units: Design and Comparison.

Milena Vratonjic, Bart R. Zeydel, Vojin G. Oklobdzija

Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005