Milan Radulovic

Orcid: 0000-0001-9244-743X

According to our database1, Milan Radulovic authored at least 12 papers between 2013 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2021

2019
Memory bandwidth and latency in HPC: system requirements and performance impact.
PhD thesis, 2019

PROFET: Modeling System Performance and Energy Without Simulating the CPU.
Proc. ACM Meas. Anal. Comput. Syst., 2019

2018
Mainstream vs. Emerging HPC: Metrics, Trade-Offs and Lessons Learned.
Proceedings of the 30th International Symposium on Computer Architecture and High Performance Computing, 2018

Main memory latency simulation: the missing link.
Proceedings of the International Symposium on Memory Systems, 2018

HPC Benchmarking: Scaling Right and Looking Beyond the Average.
Proceedings of the Euro-Par 2018: Parallel Processing, 2018

2017
Main Memory in HPC: Do We Need More or Could We Live with Less?
ACM Trans. Archit. Code Optim., 2017

2016
Large-Memory Nodes for Energy Efficient High-Performance Computing.
Proceedings of the Second International Symposium on Memory Systems, 2016

Performance Impact of a Slower Main Memory: A case study of STT-MRAM in HPC.
Proceedings of the Second International Symposium on Memory Systems, 2016

2015
Another Trip to the Wall: How Much Will Stacked DRAM Benefit HPC?
Proceedings of the 2015 International Symposium on Memory Systems, 2015

Limpio: LIghtweight MPI instrumentatiOn.
Proceedings of the 2015 IEEE 23rd International Conference on Program Comprehension, 2015

2013
Industrial Single Board Computer based on OMAP5 processor.
Proceedings of the 2nd Mediterranean Conference on Embedded Computing, 2013


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